Embedded System Exponential Computation Using Segmented Lookup Tables
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Solution Overview
Problem
Existing embedded systems face challenges in efficiently and cost-effectively computing exponential values due to the large memory requirements of full look-up table (LUT) implementations, which are necessary for accurate 16-bit exponential calculations, making them unsuitable for resource-constrained applications like Digital Radio Mondiale (DRM) communication units.
Innovation Solution
The implementation of a reduced-size look-up table (LUT) based exponential computation method that splits input data into subsets and uses multiple smaller LUTs to compute exponential values, significantly reducing memory requirements while maintaining accuracy, by parsing input data into subsets of equal or unequal bit-lengths and multiplying the extracted values to produce the exponential computation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a full look-up table (LUT) with 64KB entries is used to compute 16-bit exponential values, then computation accuracy is improved, but memory requirement increases significantly
Solution Approach 1:
The patent divides the 16-bit input into multiple smaller subsets (e.g., four 4-bit subsets). Instead of using one large 64KB LUT, it employs multiple smaller LUTs (e.g., four 4-entry LUTs), each handling a subset. The final result is obtained by multiplying the values from these smaller LUTs, thereby achieving the same computational accuracy with significantly reduced memory requirements.
2Quantity of substance
If a reduced-size LUT is used to decrease memory requirements, then memory cost is reduced, but computation speed may be affected
Solution Approach 1:
By segmenting the computation into multiple smaller LUT lookups and multiplications, the system achieves faster access times compared to a single large LUT. The smaller LUTs can be implemented more efficiently in hardware, and the parallel nature of the subset operations can be exploited to improve overall computation speed while maintaining reduced memory footprint.
Solution Approach 2:
The patent combines multiple small LUT operations with multiplication to achieve the final exponential result. This merging of operations (lookup + multiplication) provides an efficient alternative to a single large LUT, balancing memory usage and computation speed by leveraging the strengths of both approaches.
3Quantity of substance
If Taylor series expansion is used for exponential computation, then memory requirement is reduced, but computation complexity increases for achieving acceptable accuracy
Solution Approach 1:
The patent segments the input into smaller subsets and uses pre-computed LUTs for each subset, avoiding the need for complex iterative Taylor series calculations. This segmentation transforms a computationally intensive series expansion into simpler table lookups and multiplications, reducing both memory requirements and computation complexity.
Solution Approach 2:
The patent performs preliminary computation by pre-calculating and storing exponential values in small LUTs during system initialization or manufacturing. This preliminary action eliminates the need for complex real-time calculations during operation, simplifying the runtime computation while maintaining accuracy.
Data Source
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AI summary
An embedded system (200) is described. The embedded system (200) comprises: a processing circuit (202) comprising at least one processor configured to support an exponential computation; and a plurality of look-up tables, LUTs (420), where the LUTs are of a size less than 2^N and contain a plurality of exponential values. The processing circuit (202) is configured to: receive the input data; parse the input data into a plurality of subsets of data; extract respective exponential values from the plurality of LUTs associated with the respective data subset; and multiply the plurality (m) of extracted exponential values to produce an exponential computation of the N-bit input data (440, 540).