Embedded Test Circuit for Physically Unclonable Function Quality
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Solution Overview
Problem
Existing methods for assessing the quality of Physically Unclonable Functions (PUFs) are limited, particularly in determining reliability and security on-device and in-field, and often require complex external test circuits, which can introduce perturbations and are not non-perturbative.
Innovation Solution
The implementation of an embedded test system that uses service challenges to assess PUF quality by generating service responses, which are compared to predefined patterns to determine deviations, allowing for reliable and secure characterization of PUF properties, including reliability and tampering detection, without external hardware intrusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external test circuits are used to assess PUF quality, then measurement capability is improved, but device complexity and perturbation increase
Solution Approach 1:
The patent merges the test circuit functionality directly into the PUF device by embedding test logic and challenge-response mechanisms within the PUF structure itself. This integration eliminates the need for separate external test equipment, thereby maintaining measurement capability while reducing overall device complexity and avoiding perturbations from external connections.
Solution Approach 2:
The PUF device performs self-testing through embedded test logic that can autonomously generate service challenges, receive PUF responses, and evaluate quality metrics without external intervention. This self-service approach enables quality assessment while minimizing external perturbations and reducing the complexity of separate test systems.
2Measurement precision
If external test circuits are used to assess PUF quality, then measurement capability is improved, but perturbation and reliability decrease
Solution Approach 1:
By integrating test functionality within the PUF device boundaries, the patent eliminates external connections and interfaces that could introduce perturbations. The embedded test circuit shares the same physical substrate and operational environment as the PUF, ensuring that measurements are taken without external disturbances that could affect reliability.
Solution Approach 2:
The embedded test logic continuously monitors PUF responses and detects deviations from expected behavior before they compromise system reliability. By performing preliminary quality assessments and detecting tampering or environmental stress early, the system can take corrective actions or alert operators before reliability is significantly impacted.
3Reliability
If comprehensive PUF testing is implemented, then quality assessment is improved, but manufacturing cost increases
Solution Approach 1:
The patent combines quality assessment functionality with the core PUF operational logic, allowing the same hardware structure to serve both functional and testing purposes. This merger eliminates the need for separate test infrastructure, reducing manufacturing complexity and cost while maintaining comprehensive quality assurance capabilities.
Solution Approach 2:
The embedded test logic is designed to perform multiple quality assessment functions including reliability evaluation, tampering detection, and environmental stress monitoring within a single integrated circuit block. This multi-functionality reduces the overall manufacturing complexity compared to implementing separate specialized test circuits for each function.
Data Source
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Figure 2C~2D
AI summary
There is disclosed a silicon integrated circuit comprising a Physically Unclonable Function and an online or embedded test circuit, said online test circuit comprising one or more circuit parts being physically adjacent to said PUF and said one or more circuits embodying one or more tests which can be performed to determine one or more quality properties of said PUF or otherwise characterize it. Different tests with specific associated method steps are described.