Embedded Thin Film Capacitors in Package Substrates
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Solution Overview
Problem
Current methods for integrating capacitors into electronic systems are inefficient, leading to bulky components, increased package size, and reduced capacitance density due to the need for additional steps and proprietary dielectric layers, which increase costs and reduce throughput.
Innovation Solution
The integration of an embedded thin film capacitor within a package substrate using a conductive adhesion layer that serves as both an adhesive and dielectric, eliminating the need for surface roughening and proprietary dielectric layers, and allowing simultaneous formation with the substrate's conductive traces and vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If capacitors are mounted externally on the package substrate, then the capacitor integration is simple, but the package assembly size increases significantly
Solution Approach 1:
The patent merges the capacitor structure with the package substrate by embedding capacitor plates within the substrate layers themselves, rather than mounting separate capacitor components externally. This integration combines two previously separate elements (substrate and capacitor) into a single unified structure, reducing overall package size while maintaining manufacturing feasibility through established lamination processes
Solution Approach 2:
The capacitor plates are nested within the package substrate layers, with conductive plates positioned between insulating layers during the substrate fabrication process. This nesting approach allows the capacitor to be contained within the substrate volume rather than occupying external space, effectively reducing the package assembly footprint
2Area of stationary object
If capacitors are embedded in the package substrate using conventional methods, then the package size is reduced, but additional surface roughening and lamination steps are required
Solution Approach 1:
The capacitor fabrication steps are merged with the existing substrate manufacturing process. Conductive plates are formed and positioned during the same lamination sequence used to build the substrate layers, eliminating the need for separate surface roughening and dedicated capacitor embedding steps that would otherwise be required
Solution Approach 2:
The lamination process serves multiple functions simultaneously: it bonds the substrate layers together and also forms the capacitor structure by positioning conductive plates between insulating layers. This multi-functionality reduces the total number of process steps required compared to conventional methods that treat substrate fabrication and capacitor embedding as separate operations
3Ease of manufacture
If proprietary dielectric layers are used for embedded capacitors, then the capacitor integration is achieved, but the production cost increases
Solution Approach 1:
The patent uses standard, commercially available dielectric materials that are consistent with the rest of the substrate construction, rather than proprietary or specialized dielectric layers. This homogeneity in material selection reduces costs by eliminating the need to source and process expensive proprietary materials, while still achieving reliable capacitor functionality
Solution Approach 2:
The invention employs conventional, low-cost dielectric materials that can be readily obtained through standard semiconductor supply chains, replacing expensive proprietary dielectric layers. These standard materials provide sufficient performance for capacitor applications without the premium cost associated with specialized proprietary materials
4Ease of manufacture
If proprietary dielectric layers with increased thickness are used, then the capacitor integration is simplified, but the capacitance density decreases
Solution Approach 1:
The patent optimizes the dielectric layer thickness to achieve the desired capacitance density while maintaining manufacturability. By carefully controlling the thickness parameter of the dielectric layers during lamination, the design achieves high capacitance density without requiring excessively thin layers that would be difficult to manufacture or proprietary materials that would increase cost
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the size of capacitors, increases capacitance density, and lowers production costs by streamlining the fabrication process and eliminating the need for additional steps, while maintaining strong bonding and electrical insulation.
Implementation Method 1
an adhesion layer disposed on the first insulating layer and on the first region of the bottom plate. The portion of the second adhesion layer disposed on the bottom plate electrically insulates the top plate from the bottom plate
Implementation Method 2
a first insulating layer disposed on a bottom plate and a first trace, a second insulating layer disposed on the first trace and the bottom plate
Data Source
AI summary
An embedded thin film capacitor and methods of its fabrication are disclosed. The embedded thin film capacitor includes two conductive plates separated by a dielectric layer. In embodiments, the capacitor is enclosed within a package substrate. A method of forming the embedded thin film capacitor includes forming a first insulating layer on a bottom plate and a first trace. A first opening is then formed in a first insulating layer to expose a first region of a bottom plate. An adhesive layer is then formed on the first insulating layer and on top of the exposed first region of the bottom plate. A second opening is formed through the insulating layer and the first insulating layer to expose a second region of the bottom plate. A top plate is formed within the first opening and a via is formed within the second opening.