Embedded Thin-Film Capacitors Using Low-Temperature Diffusion Bonding
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Solution Overview
Problem
Current methods for embedding high performance ceramic oxide dielectrics with high capacitance density in organic substrate packages are limited by the need for high temperature processing, which is not compatible with organic packaging environments, leading to thermal degradation and reliability issues.
Innovation Solution
The use of low temperature diffusion bonding to integrate highly crystalline ceramic oxide dielectric layers within organic substrates, allowing for the formation of thin film capacitors with capacitance densities of 10 nF/mm2 or greater without damaging the organic layers, and enabling direct placement of capacitors below active components for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high temperature processing (above 600°C) is used to form crystalline ceramic oxide dielectric layers, then high capacitance density (greater than 10 nF/mm2) is achieved, but thermal degradation of organic substrate occurs
Solution Approach 1:
The process is segmented into two distinct stages: first, the ceramic oxide dielectric layer is deposited at low temperature on a separate carrier substrate where high temperature crystallization can occur without damaging organic materials; second, the fully crystallized capacitor structure is transferred and integrated into the organic package. This segmentation allows each stage to be optimized independently, achieving high capacitance density while preserving organic substrate integrity.
Solution Approach 2:
The ceramic oxide dielectric layer is preliminarily crystallized on a carrier substrate before integration into the organic package. This preliminary high temperature treatment forms the desired perovskite crystal structure necessary for high capacitance density, and subsequent low temperature processing steps complete the capacitor formation without requiring the organic substrate to withstand high temperatures.
2Ease of manufacture
If vertically aligned sandwich capacitors are placed into cavities using pick and place tools, then capacitor integration is achieved, but process complexity and capital equipment requirements increase
Solution Approach 1:
The capacitor structure is merged with the substrate fabrication process itself. The ceramic oxide dielectric layer is deposited directly onto the substrate or carrier substrate using thin film deposition techniques, and subsequent processing steps integrate the capacitor formation with the existing packaging workflow. This eliminates the need for separate pick and place equipment, cavity preparation tools, and adhesive application systems.
Solution Approach 2:
The complex pick and place process, including cavity creation, desmear processing, and precision positioning equipment, is extracted and replaced by a simplified thin film deposition and low temperature bonding approach. The capacitor structure is formed in-situ or pre-formed on a carrier that integrates seamlessly with the substrate, removing multiple capital equipment requirements.
3Ease of manufacture
If preformed capacitors are attached using special adhesive films, then capacitor placement is achieved, but foreign material contamination and reliability issues occur
Solution Approach 1:
A thin film barrier layer serves as an intermediary between the electrode and the ceramic oxide dielectric layer. This barrier layer is deposited as part of the thin film stack and provides a controlled interface that prevents direct contact between the electrode and dielectric, eliminating the need for adhesive films and preventing foreign material contamination while maintaining electrical performance.
4Quantity of substance
If laser or plasma annealing is used to crystallize deposited ceramic dielectric films, then capacitance is improved, but film damage and discontinuity occur
Solution Approach 1:
The processing parameters are changed from high temperature localized annealing to low temperature prolonged processing. The low temperature processing regime (below 250°C) allows sufficient time for crystal formation and capacitance optimization without the thermal shock and localized heating that cause film damage and discontinuity in laser or plasma annealing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces system mass and footprint, enhances electrical performance by eliminating lead contacts and parasitics, and improves thermo-mechanical reliability, while allowing for flexible design and reduced noise in multi-chip modules by minimizing interconnect distance.
Implementation Method 1
curing the dielectric layer provides a crystalline microstructure to the dielectric layer
Implementation Method 2
bonding the first conductive layer to a second conductive layer that is adhered to a package substrate, wherein the bonding comprises a diffusion bonding process
Data Source
AI summary
Embodiments disclosed herein include an electronic package and methods of forming an electronic package. In an embodiment, the electronic package comprises a package substrate, an organic layer over the package substrate, and a capacitor embedded in the organic layer. In an embodiment, the capacitor comprises, a first electrode, where the first electrode comprises a seam between a first conductive layer and a second conductive layer, a dielectric layer over the first electrode, and a second electrode over the dielectric layer.