Embedded Timed Attestation Module for Security Exploit Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing attestation systems are unable to detect and correct security exploits that mimic proper operation, require processor core usage, and lack the ability to repair altered memory blocks, leading to compromised system integrity.

Innovation Solution

The implementation of an Embedded Timed Attestation Process (ETAP) module with a high-resolution timer, a field programmable gate array (FPGA), and shadow memory to autonomously perform attestation, reducing reliance on external verifiers and enhancing security by using standardized results for comparison and data replacement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional attestation routines are used to check system integrity, then security verification is performed, but processor cores are occupied causing interference with client operation

Engineering Contradiction:
Improvesystem integrity verificationVSAvoidclient operation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system separates attestation functions from the main processor by introducing dedicated attestation processor cores. These specialized cores handle security verification tasks independently, allowing the main processor to continue its intended operations without interference while maintaining system integrity checks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An embedded attestation module acts as an intermediary between the verifier and the client system. This module includes dedicated attestation processor cores that handle verification tasks, mediating between security requirements and operational efficiency needs without requiring the main processor to be occupied.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If attestation routines check memory blocks for alterations, then security issues are detected, but the ability to correct altered memory blocks is lacking

Engineering Contradiction:
Improvesecurity exploit detectionVSAvoidmemory block correction capability
Core Design Contradiction:
ReliabilityVSEase of repair

Solution Approach 1:

The system stores corrected versions of code and data in protected memory regions before attestation checks are performed. When alterations are detected, the system can immediately restore the correct versions from these pre-prepared copies, enabling quick correction without external intervention.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The attestation module includes self-healing capabilities where the embedded processor can automatically detect altered memory blocks and restore them using corrected versions stored in protected memory, without requiring external verification or manual intervention for each correction.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If security exploits mimic proper operation, then system operation appears normal, but traditional attestation routines cannot detect these exploits

Engineering Contradiction:
Improvesystem operation normalityVSAvoidexploit detection capability
Core Design Contradiction:
Ease of operationVSDifficulty of detecting and measuring

Solution Approach 1:

The embedded attestation module continuously monitors system operations and provides feedback to the verifier. It checks not only final results but also intermediate states and operational patterns, enabling detection of exploits that mimic normal operation by identifying subtle deviations from expected behavior patterns.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The attestation system performs dynamic analysis by monitoring system behavior over time rather than static checks alone. The embedded processor tracks operational patterns, timing characteristics, and state transitions to detect exploits that dynamically mimic proper operation, adapting verification strategies based on observed system behavior.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11010268B1Embedded timed attestation process
Publication Date: 2021.05.18 THE GOVERNMENT OF THE UNITED STATES AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE
  • US11010268B1 patent drawing
  • US11010268B1 patent drawing
  • US11010268B1 patent drawing

AI summary

A client with a processor having at least one core and a client timer, and an ETAP module comprising an ETAP high resolution timer, wherein the client processor is programed to use the ETAP timer instead of the client timer to perform timed attestation and produce test results.