Embedded Trace Substrate Core Layout for Mixed Interconnect Density
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Solution Overview
Problem
Existing embedded trace substrates (ETS) are not suitable for larger devices such as automotive vehicles without redesigning the die, which is costly and inefficient.
Innovation Solution
A substrate design incorporating a core substrate portion with core interconnects and a coreless substrate portion with narrower interconnects, separated by a dielectric layer, allowing for different interconnect densities and pitches to accommodate both mobile and automotive device requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a coreless substrate is used for mobile devices with small footprints, then the device can be compact and suitable for portable applications, but the substrate is not suitable for larger devices such as automotive vehicles without redesigning the die
Solution Approach 1:
The substrate is divided into two distinct portions: a core substrate portion with a core layer having wider minimum width interconnects, and a coreless substrate portion with narrower minimum width interconnects. This segmentation allows each portion to be optimized for different interconnect density requirements, enabling the substrate to accommodate both mobile and automotive device applications without die redesign
Solution Approach 2:
Different regions of the substrate are assigned different interconnect characteristics. The core substrate portion provides wider interconnects suitable for automotive applications, while the coreless substrate portion provides narrower interconnects suitable for mobile applications. This local differentiation allows a single substrate to serve multiple device types
2Adaptability or versatility
If a substrate is designed with uniform interconnect width for mobile devices, then the die can be optimized for small footprint, but the same substrate cannot accommodate automotive vehicles requiring different spacing and pitch
Solution Approach 1:
The substrate is divided into two distinct portions: a core substrate portion with a core layer having wider minimum width interconnects, and a coreless substrate portion with narrower minimum width interconnects. This segmentation allows each portion to be optimized for different interconnect density requirements, enabling the substrate to accommodate both mobile and automotive device applications without die redesign
Solution Approach 2:
The substrate is designed to perform multiple functions by incorporating both core and coreless portions, allowing a single substrate design to support both mobile devices with small footprints and automotive vehicles with larger footprints, eliminating the need for separate substrate designs for different device types
3Adaptability or versatility
If the die is redesigned to accommodate automotive vehicle requirements, then the substrate can support larger devices, but the cost and time for redesign become prohibitive
Solution Approach 1:
The substrate is pre-designed with both core and coreless portions during the initial design phase, anticipating future automotive applications. This preliminary incorporation of multiple interconnect types allows the same die to be used across different device types without requiring later redesign, saving significant time and resources
Data Source
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AI summary
A substrate that includes a first substrate portion, a second substrate portion and a second dielectric layer. The first substrate portion includes a core layer having a first core surface, and a plurality of core substrate interconnects, wherein the plurality of core substrate interconnects includes a plurality of surface core substrate interconnects formed over the first surface of core layer. The second substrate portion includes a first dielectric layer having a first dielectric surface, the first dielectric surface facing the first core surface of the core layer, and a plurality of substrate interconnects, wherein the plurality of substrate interconnects includes a plurality of interconnects formed over the first dielectric surface. The second dielectric layer is formed between the first substrate portion and the second substrate portion such that the plurality of surface core substrate interconnects and the plurality of substrate interconnects are located in the second dielectric layer.