Embedded Transfer Gate Layout for High-Density CMOS Image Sensors
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Solution Overview
Problem
As CIS pixels are made smaller, it becomes challenging to solve packaging issues, maintain sensitivity, and limit cross-talk due to crowding of structures on the front side of the semiconductor substrate, particularly with the alignment of isolation structures and transfer gate electrodes.
Innovation Solution
The transfer gate electrode is embedded and recessed below the front side surface of the semiconductor substrate, with a monolithic structure and vertical channel design that wraps around the floating diffusion region, reducing surface crowding and allowing for improved gate control, while vias are strategically placed to couple with the isolation structure and floating diffusion regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CIS pixels are made smaller to reduce device size, then productivity and device compactness improve, but manufacturing precision deteriorates due to alignment difficulties of isolation structures and transfer gate electrodes
Solution Approach 1:
The transfer gate electrode is moved from the front surface to the back surface of the semiconductor substrate, utilizing the third dimension (depth) to resolve the alignment conflict. This dimensional transition allows the electrode to be positioned below the photodetector pixel while maintaining proper electrical connection, thereby enabling smaller pixel sizes without compromising alignment precision.
Solution Approach 2:
The transfer gate electrode is embedded within the semiconductor substrate at a depth that positions it below the photodetector pixel structure. This nesting approach allows the electrode to be contained within the substrate volume rather than occupying surface space, facilitating higher pixel density while maintaining manufacturing feasibility.
2Ease of operation
If transfer gate electrode is recessed below surface to reduce crowding, then ease of operation improves by reducing surface congestion, but device complexity increases due to additional alignment requirements
Solution Approach 1:
By relocating the transfer gate electrode to the back surface and embedding it at a specific depth, the design clears the front surface for other structures while managing alignment complexity through the vertical dimension. This dimensional shift provides surface space without proportionally increasing overall system complexity.
Solution Approach 2:
The photodetector pixel structure itself serves as the alignment reference for the transfer gate electrode. The electrode is positioned relative to the pixel's own geometry rather than requiring external alignment marks or additional reference structures, thereby reducing overall alignment complexity.
3Reliability
If transfer gate electrode is embedded in substrate to improve voltage regulation, then reliability improves, but manufacturing precision requirements worsen due to deeper etching and alignment needs
Solution Approach 1:
The photodetector pixel structure serves as the self-aligning reference for the transfer gate electrode position. The electrode is formed in relation to the pixel's own geometry, eliminating the need for separate alignment processes and reducing etch depth control requirements while maintaining proper voltage regulation.
Solution Approach 2:
The formation of the transfer gate electrode is combined with the photodetector pixel fabrication process. Both structures are created in the same processing sequence using mutual alignment, which reduces the number of independent precision requirements compared to forming them as separate steps.
Data Source
AI summary
A CIS has a monolithic transfer gate electrode embedded in the semiconductor substrate. In some embodiments, the transfer gate electrode is below the surface. In some embodiments, the top of the transfer gate electrode is nearly even with or below a bottom of a floating diffusion region. In some embodiments, the transfer gate electrode wraps partially around the area of the floating diffusion region. In some embodiments, the transfer gate electrode wraps entirely around the area of the floating diffusion region. Embedding the transfer gate in the substrate reduces surface crowding and allows a scale reduction. The wrapping of the transfer gate electrode around the area of the floating diffusion region increases the area of the transfer gate channel while limiting the area that is occupied by the transfer gate.