Embedded Trench Capacitor Core Layout to Prevent Shift and Rotation

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Solution Overview

Problem

Existing IC packaging technologies face challenges with embedded deep trench capacitors (DTCs) shifting or rotating within thicker substrate cores due to thickness mismatches, leading to yield, reliability, and manufacturability issues, along with voiding and alignment problems.

Innovation Solution

The embedding of DTCs within core layers of a package substrate is achieved by matching their thickness with the core layer, using a metal/insulator/metal film stack and encapsulant material to ensure coplanarity, preventing shifting and rotation, and enabling additional routing layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a thin DTC limited to about 600 micron thickness is used, then silicon processing limitations are satisfied, but thickness mismatch with thicker substrate cores occurs leading to shifting and rotation

Engineering Contradiction:
Improvethickness matchingVSAvoidDTC stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent changes the thickness parameter of the DTC from the conventional 600 micron limit to a customizable thickness that matches the substrate core thickness. This is achieved by forming the DTC within a cavity of the substrate core, allowing the DTC thickness to be substantially equal to the core thickness, thereby eliminating thickness mismatch and improving both manufacturing precision and reliability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transitions from embedding a thin DTC into a thick core (creating a thickness mismatch in one dimension) to forming the DTC thickness to match the core thickness (achieving coplanarity in the thickness dimension). This dimensional matching prevents shifting and rotation by eliminating the height difference between the DTC and core surfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If encapsulant material is used to fill the cavity, then DTC is embedded into the substrate core, but voiding occurs due to insufficient filling

Engineering Contradiction:
Improveembedding completenessVSAvoidfilling uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary actions by first forming the cavity with precise dimensions, then placing the DTC within the cavity before filling with encapsulant material. This sequence ensures that the DTC is properly positioned and the encapsulant can completely fill the remaining space without voids, achieving both reliable embedding and uniform filling.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If additional routing layers are added to increase functionality, then device performance is enhanced, but device complexity increases

Engineering Contradiction:
Improverouting capabilityVSAvoidlayer structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the substrate core into multiple functional layers, including the cavity-containing core layer and additional routing layers. This segmentation allows each layer to serve specific functions: the core layer houses the DTC while additional layers provide routing capabilities. The segmented structure enables enhanced functionality without overwhelming complexity, as each layer can be independently designed and manufactured.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250218983A1Microelectronic structures including embedded integrated capacitor in multilayer core
Publication Date: 2025.07.03 INTEL CORP
  • US20250218983A1 patent drawing
  • US20250218983A1 patent drawing
  • US20250218983A1 patent drawing

AI summary

Microelectronic integrated circuit package structures include one or more trench capacitors extending through a portion a device structure. The device structure is embedded within a portion of a core layer of a multi core package substrate, wherein one or more conductive interconnect structures are coupled with the one or more trench capacitors. A thickness of the device structure is equal to a thickness of the core layer.