Embedded VGA Equalizer Front-End for Stable High-Speed Signal Gain

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Solution Overview

Problem

High-frequency signals transmitted through high-speed bus interfaces in mobile electronic devices experience attenuation, leading to inconsistent amplification and equalization across various frequencies, which affects the performance of receivers in these devices.

Innovation Solution

A receiving circuit with multiple equalizer stages, each incorporating a source degeneration circuit and a trans-impedance amplifier (TIA) with embedded variable gain amplifiers, where feedback resistors are configured to provide gain control, and poly-resistors are used in conjunction with PMOS resistors to maintain consistent frequency response across different gain settings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high-frequency signals are transmitted through high-speed bus interfaces, then data transmission speed is improved, but signal attenuation increases leading to inconsistent amplification and equalization performance

Engineering Contradiction:
Improvedata transmission speedVSAvoidsignal transmission quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The equalizer is divided into multiple stages (first equalizer circuit and second equalizer circuit), each with its own TIA and source degeneration circuit. This segmentation allows different stages to handle different aspects of signal equalization, improving overall signal quality at high frequencies while maintaining transmission speed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each equalizer stage is configured with specific source degeneration circuits and feedback resistors tailored to its function. The first equalizer circuit handles certain frequency ranges while the second handles others, providing locally optimized equalization for different parts of the signal spectrum

Inventive Principle:
Principle #3Local quality

2Power

If variable gain amplifiers are used to amplify received signals, then signal strength is improved, but parasitic capacitance effects increase causing inconsistent frequency response

Engineering Contradiction:
Improvesignal amplificationVSAvoidfrequency response consistency
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The variable gain amplifier is embedded within the TIA structure rather than being a separate external component. This integration extracts the parasitic capacitance that would otherwise be introduced by external connections and components, maintaining consistent frequency response across different gain settings

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The variable gain amplifier is merged with the TIA to form an integrated structure. This combining of functions eliminates the need for separate gain control components that would introduce additional parasitic capacitance, thereby maintaining frequency response consistency while providing variable gain

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If feedback resistors are used to control gain in TIA, then gain adjustability is improved, but device complexity increases

Engineering Contradiction:
Improvegain control capabilityVSAvoidcircuit configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The feedback resistors serve multiple functions: they provide gain control for the variable gain amplifier and simultaneously maintain consistent frequency response when combined with the integrated TIA structure. This multi-functionality reduces the need for additional separate control components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11863356B2Analog receiver front-end with variable gain amplifier embedded in an equalizer structure
Publication Date: 2024.01.02 QUALCOMM INC
  • US11863356B2 patent drawing
  • US11863356B2 patent drawing
  • US11863356B2 patent drawing

AI summary

A receiver has a first equalizer circuit that includes a first stage having a source degeneration circuit and a trans-impedance amplifier (TIA). The source degeneration circuit includes a resistor coupled in parallel with a capacitor. The TIA includes an embedded variable gain amplifier with a gain controlled by feedback resistors. Each feedback resistor is coupled between input and output of the TIA. In some implementations, the receiving circuit has a second equalizer circuit coupled in series with the first equalizer circuit. The second equalizer circuit includes a first stage having a source degeneration circuit and a TIA. The source degeneration circuit in the second equalizer circuit has a source degeneration resistor coupled in parallel with a source degeneration capacitor and the TIA includes an embedded variable gain amplifier whose gain is controlled by feedback resistors coupled between input and output of the TIA in the second equalizer circuit.