Semiconductor Package EMI Shielding via Metal Frame and Redistribution Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packages face challenges with electromagnetic interference (EMI) shielding due to poor step coverage on side surfaces, leading to decreased contact area between the shielding film and interconnection layers, resulting in lower EMI shielding performance and increased package thickness.
Innovation Solution
A semiconductor package design featuring an interconnection part with insulating layers and a metal frame structure that includes a first and second frame, where the EMI shielding part is connected to the redistribution layer through openings in the insulating layers, ensuring comprehensive coverage of the semiconductor chip's lateral surfaces and improved contact with the interconnection layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an EMI shielding process is applied to conventional fan-out packages, then EMI shielding is provided, but the step coverage on side surfaces is poor resulting in decreased contact area between shielding film and interconnection layer
Solution Approach 1:
The patent applies preliminary action by forming the EMI shielding film on the interconnection layer before attaching the semiconductor chip. This allows the shielding film to be deposited on flat surfaces with good step coverage, avoiding the problem of poor coverage on vertical side surfaces that would occur if shielding were applied after chip attachment.
Solution Approach 2:
The patent transitions from three-dimensional side surface coverage to two-dimensional planar coverage by depositing the EMI shielding film on the horizontal interconnection layer before chip attachment. This dimensional change eliminates the step coverage problem inherent in vertical surface deposition.
2Ease of operation
If wire bonding and PCB substrate are used in conventional fan-out packages, then electrical connection is achieved, but the loop length increases resulting in lowered electrical performance
Solution Approach 1:
The patent extracts and eliminates the PCB substrate and wire bonding from the package structure. Instead, it uses a metal frame with integrated interconnection layers that provide direct electrical connection between the semiconductor chip and external terminals, significantly reducing the current loop length and improving electrical performance.
Solution Approach 2:
The patent merges the functions of the PCB substrate and wire bonds into a single integrated metal frame structure. The metal frame simultaneously provides mechanical support, electrical connection, and EMI shielding functions, eliminating the need for separate PCB and wire bonding components.
3Device complexity
If conventional fan-out package structure is used, then package assembly is simplified, but the final package thickness increases
Solution Approach 1:
The patent uses thin film EMI shielding layers deposited on the interconnection layer and thin metal frame structures to achieve EMI shielding and mechanical support with minimal thickness addition. This replaces the thicker conventional PCB substrate and separate shielding components.
Data Source
AI summary
Provided are a semiconductor package and a method of manufacturing the same, the semiconductor package including an interconnection part including an insulation layer and an interconnection layer, a semiconductor chip disposed on the interconnection part and electrically connected to the interconnection layer through a bonding pad, and an EMI shielding part connected to the interconnection layer while covering the semiconductor chip and the interconnection part.