EMIB Routing Configuration for Reduced Capacitance
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Solution Overview
Problem
Integrated circuit (IC) assemblies face challenges in achieving dense interconnect routing with minimal capacitance and power efficiency due to high signal loss and capacitance in existing interposers and bridges, which degrades power efficiency and signaling rates.
Innovation Solution
The implementation of a routing configuration with alternating layers of ground and signal traces, along with dummy traces, in an Embedded Multi-Die Interconnect Bridge (EMIB) to reduce capacitance and enhance power efficiency, utilizing semiconductor manufacturing techniques for high-density routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dense interconnect routing is implemented using conventional interposers and bridges, then routing density is improved, but capacitance and signal loss increase quadratically with routing length
Solution Approach 1:
The routing structure is segmented into multiple alternating layers of signal traces and ground traces. This segmentation allows the signal path to be divided into smaller segments with ground references between them, reducing the overall capacitance and signal loss compared to a single continuous trace.
Solution Approach 2:
Ground traces are introduced as intermediary elements between signal traces. These ground traces act as mediators that provide reference planes and reduce capacitive coupling between adjacent signal traces, thereby reducing overall capacitance and signal loss in the dense routing configuration.
2Loss of energy
If thicker dielectric materials and lower dielectric constants are used, then capacitance is reduced, but processing complexity and cost increase
Solution Approach 1:
Instead of changing the dielectric material parameters (thickness or dielectric constant), the invention changes the geometric parameters of the routing structure by introducing alternating ground traces. This approach reduces capacitance through geometric configuration rather than material property changes, avoiding increased processing complexity.
3Productivity
If dense interconnect routing is implemented, then interconnect density is improved, but power efficiency degrades due to increased capacitance
Solution Approach 1:
The signal routing is segmented with periodic ground traces that reduce capacitive loading. This segmentation allows dense routing while maintaining lower capacitance per unit length, thereby improving power efficiency despite the increased routing density.
Solution Approach 2:
Ground traces serve as intermediary structures that reduce the electric field coupling between signal traces. This intermediary structure reduces the capacitive effect and associated power consumption, enabling dense interconnect routing with improved power efficiency.
Data Source
AI summary
Embodiments of the present disclosure are directed toward interconnect routing configurations and associated techniques. In one embodiment, an apparatus includes a substrate, a first routing layer disposed on the substrate and having a first plurality of traces, and a second routing layer disposed directly adjacent to the first routing layer and having a second plurality of traces, wherein a first trace of the first plurality of traces has a width that is greater than a width of a second trace of the second plurality of traces. Other embodiments may be described and/or claimed.