Emission Driver Boosting Circuit for Lower Clock Load
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Solution Overview
Problem
The large load applied to clock signals in display devices increases power consumption in gate and emission drivers, leading to increased power consumption in the display device.
Innovation Solution
The emission and gate drivers are designed with boosting circuits that include specific transistor configurations and capacitors to reduce the load on clock signals, utilizing N-type transistors and alternating clock signals with reduced voltage differences to minimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a conventional boosting circuit is used to output high gate voltage, then the emission signal can be generated, but the load on the clock signal is large and power consumption is increased
Solution Approach 1:
The boosting circuit is divided into multiple stages with different transistors handling different voltage levels. The first transistor outputs a first high gate voltage, the second transistor outputs a second high gate voltage, and the third transistor outputs a third high gate voltage. This segmentation allows each transistor to operate more efficiently with reduced individual load requirements, thereby reducing the overall load on the clock signal and power consumption.
Solution Approach 2:
The circuit dynamically selects different transistor paths based on the required output voltage level. By using multiple transistors with different gate electrode connections and electrode configurations, the circuit can adaptively switch between different boosting paths to minimize the load on the clock signal while maintaining the required emission signal output.
2Power
If the voltage difference between high and low levels is large, then the emission signal has sufficient driving capability, but power consumption increases
Solution Approach 1:
Different transistors are configured with different local characteristics to handle different voltage levels. The first transistor has its gate electrode connected to receive a first clock signal and outputs a first high gate voltage, the second transistor has its gate electrode connected to receive a second clock signal and outputs a second high gate voltage, and the third transistor has its gate electrode connected to receive a third clock signal and outputs a third high gate voltage. This local differentiation allows each transistor to operate at optimized voltage differences, maintaining driving capability while reducing overall power consumption.
Data Source
AI summary
An emission driver is disclosed that includes a plurality of emission stages, and each of the emission stages includes a boosting circuit configured to boost a voltage of a control node. The boosting circuit includes a fifth transistor including a gate electrode connected to the control node, a first electrode, and a second electrode, a 17th transistor including a gate electrode configured to receive a first clock signal, a first electrode configured to receive a second low gate voltage, and a second electrode connected to the first electrode of the fifth transistor, and an 18th transistor including a gate electrode configured to receive a second clock signal having a phase that is different from a phase of the first clock signal, a first electrode configured to receive a high gate voltage, and a second electrode connected to the first electrode of the fifth transistor.