Emission Driver Stages for Stable Gate Control Signals
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Solution Overview
Problem
Existing display apparatuses face challenges in stably outputting emission control signals, leading to instability in pixel operation and potential performance issues.
Innovation Solution
The emission control driver includes a plurality of stages with specific node controllers and output units that control voltage levels based on clock signals and start signals, ensuring stable output of gate control and carry signals, with phase-shifted clock signals and delayed off-voltage levels to manage transistor states effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional emission control drivers are used, then the device complexity is low, but the stability of emission control signal output deteriorates
Solution Approach 1:
The emission control driver is divided into multiple stages, with each stage containing separate node controllers (first node controller, second node controller) and output units (first output unit, second output unit). This segmentation allows independent control of different voltage levels and signal outputs, improving signal stability while managing complexity through modular design
Solution Approach 2:
The driver dynamically controls voltage levels at multiple nodes (first node, second node, third node, fifth node) using phase-shifted clock signals. The node controllers dynamically adjust voltages based on clock signal phases, enabling stable emission control signals through dynamic voltage management rather than static configurations
2Reliability
If phase-shifted clock signals are used to control voltage levels, then the reliability of pixel operation is improved, but the complexity of signal timing control increases
Solution Approach 1:
The system uses periodic clock signals with specific phase shifts to control voltage levels at different nodes. The first clock signal and second clock signal operate periodically with defined phase relationships, creating reliable timing patterns that ensure consistent pixel operation while simplifying control through regular periodic behavior
Solution Approach 2:
Clock signals serve as intermediary control mechanisms between the controller and the voltage nodes. The phase-shifted clock signals mediate the timing and voltage control, translating control intentions into precise voltage transitions at the appropriate nodes, thereby improving reliability while managing timing complexity through standardized signal mediation
Data Source
AI summary
A driver includes a stage that includes a first controller, a second controller, and a first output unit. The first controller controls a voltage level of a first node. The second controller controls voltage levels of a second node and a third node to be equal to the voltage level of a first node or an opposite voltage level of the voltage level of the first node, and controls a voltage level of a fifth node to be equal to the opposite voltage level of the voltage level of the first node. The first output unit may output a gate control signal, which has a first voltage when the second node and the third node is in an on-voltage level state, and has a second voltage when the fifth node is in an on-voltage level state.