Emission Driver Circuit With Multi-Level Low Gates for Leakage Control
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Solution Overview
Problem
Existing emission drivers for OLED display devices with oxide transistors or NMOS transistors face reliability issues due to leakage currents and waveform distortions, particularly in the emission and carry signals.
Innovation Solution
The emission driver incorporates a unique stage design with distinct low gate voltages applied to inverted control nodes, utilizing NMOS transistors, including a control block, emission signal output block, and carry signal output block, with specific gate voltages and capacitors to manage signal levels and reduce leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional emission drivers are used with oxide transistors or NMOS transistors, then the display device can operate, but leakage currents occur and waveform distortions appear reducing operation reliability
Solution Approach 1:
The patent applies different low gate voltages to different inverted control nodes within the emission driver circuit. Specifically, the first inverted control node receives a first low gate voltage, the second inverted control node receives a second low gate voltage, and the third inverted control node receives a third low gate voltage, where these voltages are distinct from each other. This local differentiation of voltage levels optimizes the performance of individual transistor stages, reducing leakage currents and minimizing waveform distortions at specific circuit nodes, thereby improving overall operation reliability without requiring a complete circuit redesign.
2Device complexity
If the same low gate voltage is applied to all inverted control nodes, then the circuit design is simplified, but leakage currents increase and waveform distortions occur
Solution Approach 1:
The patent implements a multi-voltage scheme where distinct low gate voltages are applied to different inverted control nodes (first, second, and third inverted control nodes). This approach prioritizes performance optimization over design simplicity, using the additional complexity of multiple voltage levels to suppress leakage currents and reduce waveform distortions that would otherwise occur with a uniform voltage approach.
Solution Approach 2:
The patent changes the voltage parameter across different control nodes by applying three different low gate voltages to the first, second, and third inverted control nodes respectively. This parameter differentiation allows each transistor stage to operate at its optimal voltage level, preventing the leakage and distortion issues that arise when a single voltage level is used for all nodes.
3Reliability
If multiple different low gate voltages are applied to inverted control nodes, then leakage currents are prevented and waveform distortions are reduced, but the device complexity increases
Solution Approach 1:
The patent applies different low gate voltages to different inverted control nodes to optimize local circuit performance. By tailoring the voltage level to each specific control node's requirements, the circuit achieves reduced leakage and distortion while maintaining a manageable level of complexity through targeted rather than universal voltage differentiation.
Solution Approach 2:
The patent implements parameter changes by applying three distinct low gate voltages to the first, second, and third inverted control nodes. This approach accepts increased device complexity as a necessary trade-off to achieve the desired improvement in operation reliability, using voltage parameter differentiation to suppress harmful effects in the emission driver circuit.
Data Source
AI summary
An emission driver includes a plurality of stages. Each stage includes an input block that transfers an input signal to a control node, a control block that controls an inverted control node and applies a third low gate voltage to the inverted control node in response to a voltage of the control node, an emission signal output block that outputs a high gate voltage as an emission signal in response to the voltage of the control node and outputs a first low gate voltage as the emission signal in response to a voltage of the inverted control node, and a carry signal output block that outputs the high gate voltage as a carry signal in response to the voltage of the control node and outputs a second low gate voltage different from the first low gate voltage as the carry signal in response to the voltage of the inverted control node. The third low gate voltage is different from the first low gate voltage and the second low gate voltage.