Emission Signal Driver Node Controller for OLED Power Reduction

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Solution Overview

Problem

Existing emission signal drivers for organic light emitting display devices face challenges in efficiently controlling the gate voltage of transistors, leading to increased power consumption and potential reliability issues due to bootstrapping effects, which affect the performance and efficiency of the display.

Innovation Solution

The proposed emission signal driver incorporates stages with node controllers, first and second inverters, and capacitors connected between the nodes and driving voltage lines, allowing for precise control of gate high and low voltages without bootstrapping, reducing power consumption and enhancing transistor reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing emission signal drivers control gate voltage using bootstrapping methods, then the gate voltage can be switched between high and low levels, but power consumption increases and transistor reliability decreases due to repeated charging and discharging

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The capacitor is pre-charged to gate high voltage through the first transistor before the gate voltage switching operation. This preliminary charging action ensures that when the gate voltage needs to be switched, the capacitor is already at the required voltage level, eliminating the need for repeated charging and discharging cycles during operation, thereby reducing power consumption and improving transistor reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The capacitor acts as an intermediary energy storage element between the voltage supply and the gate electrode. By mediating the voltage transfer through the capacitor and transistors, the system can switch gate voltage levels without direct repeated connection to the power supply, reducing unnecessary charging and discharging currents and thereby lowering power consumption while maintaining reliable transistor operation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If existing emission signal drivers switch gate voltage frequently, then the emission signal can be controlled precisely, but repeated charging and discharging of nodes occurs leading to increased power consumption

Engineering Contradiction:
Improveemission signal control precisionVSAvoidenergy loss from repeated charging and discharging
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The capacitor is pre-charged to the required gate high voltage level before emission signal operations begin. This preliminary action ensures that subsequent emission signal control operations can be performed without requiring repeated charging cycles, thereby maintaining precise control while eliminating continuous energy loss from redundant charging and discharging

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By maintaining the capacitor charged to gate high voltage continuously, the system ensures that emission signal control can be performed without interruption or repeated charging cycles. The continuous availability of charged capacitance allows precise emission signal control while eliminating the periodic energy loss associated with repeated charging and discharging operations

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11132946B2Emission signal driver and display device including the same
Publication Date: 2021.09.28 SAMSUNG DISPLAY CO LTD
  • US11132946B2 patent drawing
  • US11132946B2 patent drawing
  • US11132946B2 patent drawing

AI summary

An emission signal driver comprises stages connected to emission lines. Each of the stages includes a node controller which supplies a start signal or a carry signal, which is input to a start terminal, to a first node in response to a clock signal input to a clock terminal, a first inverter connected between the first node and a second node, and a second inverter connected between the second node and an output terminal.