eMMC Command Queue Status Feedback via CMD13
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Solution Overview
Problem
The embedded Multi-Media Card (eMMC) standard lacks command queuing, leading to inefficiencies in data bus usage and delays due to software involvement in every command and response, whereas other memory standards like UFS benefit from command queuing by allowing multiple tasks to be executed simultaneously, necessitating a method to inform the host of task status in the device.
Innovation Solution
Implementing a process within the eMMC standard to communicate the status of the queue from the device to the host using a command structure, specifically through a SEND_QUEUE_STATUS command (CMD13) during an in-progress data transfer, allowing the host to select tasks for execution after the current transfer completes without additional pins or periodic polling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If synchronous command structure is used in eMMC, then protocol simplicity is maintained, but data bus efficiency deteriorates due to sequential command execution
Solution Approach 1:
The host pre-loads multiple commands into the device's command queue before data transfer operations begin. The device executes these commands in advance, preparing task states and updating queue status registers so that when data transfer completes, the host can immediately issue the next command without waiting for software processing, thereby improving data bus efficiency while maintaining protocol simplicity
Solution Approach 2:
The command execution process is segmented into independent tasks that can be queued and executed separately. Each task is represented as an individual entry in the command queue with its own status register, allowing parallel preparation and execution of multiple commands without blocking the data bus, thus resolving the contradiction between productivity and complexity
2Speed
If software involvement in every command and response is maintained, then protocol simplicity is preserved, but execution delay increases
Solution Approach 1:
A hardware command queue structure acts as an intermediary between the host and device, with dedicated queue status registers (QSR) that automatically track task execution states. This hardware mediator eliminates the need for slow software involvement in every command-response cycle, enabling faster command execution while managing the complexity through standardized register interfaces
Solution Approach 2:
The device's command queue automatically manages task execution states through self-updating queue status registers. The hardware autonomously tracks which tasks are ready, in progress, or completed without requiring software intervention, thereby increasing execution speed while containing complexity within the hardware queue management logic
3Productivity
If command queuing is implemented without host awareness mechanism, then device functionality is improved, but host control capability deteriorates
Solution Approach 1:
Queue status registers provide continuous feedback to the host about the state of tasks in the command queue. The host can poll these registers to determine which tasks are ready for execution, ensuring no loss of queue status information while maintaining improved task execution efficiency through hardware-accelerated command processing
Data Source
AI summary
Providing command queuing in embedded memories is provided. In particular, aspects disclosed herein relate to a process through which a status of the queue is communicated to a host from a device. Aspects of the present disclosure use the command structure of the embedded Multi-Media Card (eMMC) standard, such that the host may determine a state of the queue in the device proximate a known end of an in-progress data transfer. In this manner, the host can select a task to commence after completion of a current data transfer while the current data transfer is still ongoing.