e.MMC Command Queuing for Concurrent Memory Operations
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Solution Overview
Problem
Existing memory systems face limitations in managing operations due to resource constraints, leading to inefficiencies in command execution and data transfer, particularly in systems utilizing the e.MMC protocol.
Innovation Solution
Implementing command queuing and concurrent command execution through the introduction of new command classes (CMD 43, CMD 44, CMD 45, and CMD 46) within the e.MMC protocol, allowing for efficient management of command queues and simultaneous execution of commands with minimal state machine modifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If command queuing and concurrent command execution are implemented through new command classes in the e.MMC protocol, then command execution efficiency and data transfer efficiency are improved, but device complexity increases due to additional command classes and state machine modifications
Solution Approach 1:
The patent segments command execution into distinct phases using separate command classes: CMD43 for queuing commands, CMD44 for transferring commands, CMD45 for receiving commands, and CMD46 for completing commands. This segmentation allows concurrent processing of different command types while maintaining clear protocol boundaries and state management, thereby improving productivity without overwhelming complexity.
Solution Approach 2:
The patent implements preliminary action through CMD43 (queued command request) which prepares commands in advance for execution. By queuing commands before execution is needed, the system can perform data transfer operations concurrently with command preparation, improving overall efficiency. The host can send multiple queued command requests before the memory device is ready to execute them, enabling overlapping operations.
2Speed
If concurrent command execution is enabled with minimal state machine modifications, then command processing speed increases, but reliability may be compromised due to increased complexity of command management
Solution Approach 1:
The patent incorporates feedback mechanisms through status response commands (CMD41, CMD42) that provide the host with information about command execution status. The memory device responds to queued command requests with status information, allowing the host to track which commands are pending, executing, or completed. This feedback loop ensures reliable command management even during concurrent processing, as the host can monitor and coordinate command execution appropriately.
Solution Approach 2:
The patent makes the state machine universal by designing the command queueing mechanism to work with existing e.MMC protocol structures. The new command classes (CMD43-46) integrate with the existing command processing framework, allowing the same state machine to handle both traditional and queuing-based commands. This multi-functionality approach enables concurrent processing capability enhancement while maintaining compatibility with existing reliable command execution paths.
3Productivity
If resource utilization is optimized through command queuing, then productivity improves, but device complexity increases due to additional command descriptor blocks and queue management
Solution Approach 1:
The patent applies nesting by placing command descriptor blocks within the existing e.MMC protocol framework. The command descriptor structure is nested within the card communication protocol, utilizing existing data structures and communication pathways. This allows the queuing mechanism to be implemented without requiring entirely new data structures, thereby improving resource utilization efficiency while limiting the increase in overall device complexity to manageable levels.
Solution Approach 2:
The patent introduces command descriptor blocks as intermediary structures that mediate between the host's command queue and the memory device's execution mechanism. These descriptors act as translators and coordinators, carrying command information, status information, and control signals. By using these intermediary structures, the system can manage concurrent commands efficiently without requiring direct complex interactions between the host and device, thus improving productivity with controlled complexity.
Data Source
AI summary
The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.


