Embedded MRAM Circuit Selector with Dual MTJ Architecture
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Solution Overview
Problem
Current magnetoresistive random access memory (MRAM) devices face issues such as high chip area, high cost, high power consumption, and sensitivity to temperature variations, limiting their performance and efficiency.
Innovation Solution
A circuit selector for embedded MRAM is designed, comprising a transistor with two magnetic tunneling junctions (MTJs) connected in parallel to a source/drain terminal, allowing for independent operation modes by switching between low and high resistance states based on voltage polarity, thereby optimizing space usage and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MRAM devices are used, then data retention capability is achieved, but chip area and cost increase
Solution Approach 1:
The patent combines standard and reverse MTJ cell configurations into a single integrated circuit structure. The circuit selector merges the functionality of both cell types within one physical footprint, allowing the system to achieve data retention capabilities of conventional MRAM while reducing the overall chip area by eliminating redundant separate cell structures.
Solution Approach 2:
The circuit selector is designed to universally handle both standard and reverse MTJ cell operations through a single unified structure. By implementing multi-functional capability that can selectively activate different cell types based on voltage polarity, the device achieves the reliability of dedicated structures without requiring separate physical implementations for each cell type.
2Reliability
If conventional MRAM devices are used, then data retention capability is achieved, but power consumption increases
Solution Approach 1:
The circuit selector dynamically switches between low resistance state (LRS) and high resistance state (HRS) based on the polarity of the select voltage applied to the transistor gate. This dynamic resistance adjustment allows the circuit to optimize power consumption by maintaining low resistance during active operations while achieving high resistance during standby periods, thereby preserving data retention capability with reduced overall power consumption.
Solution Approach 2:
The invention changes the resistance parameter of the circuit selector dynamically by applying different voltage polarities. By switching between LRS and HRS states, the system can control current flow to minimize power consumption while maintaining the magnetic states that ensure data retention, thus resolving the contradiction between reliability and energy usage.
3Reliability
If conventional MRAM devices are used, then data retention capability is achieved, but temperature sensitivity increases
Solution Approach 1:
The circuit selector automatically adjusts its resistance state based on the voltage polarity applied during read and write operations. During read operations, the transistor is configured to pass current through the MTJ while maintaining appropriate resistance levels. During write operations, the resistance state changes to facilitate magnetization switching. This self-adjusting mechanism reduces temperature sensitivity by compensating for thermal effects through voltage-controlled resistance modulation, while maintaining data retention capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the performance and space efficiency of MRAM devices by enabling simultaneous operation of standard and reverse cells, reducing power consumption and temperature sensitivity, while maintaining data retention without an electrical source.
Implementation Method 1
Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field
Implementation Method 2
allowing for independent operation modes by switching between low and high resistance states based on voltage polarity
Data Source
AI summary
A circuit selector of embedded magnetoresistive random access memory (EMRAM) includes a transistor comprising a source/drain terminal coupled to a first magnetic tunneling junction (MTJ) and a second MTJ, a gate terminal, and a drain/source terminal coupled to a voltage source. Preferably, the first MTJ includes a first free layer, a first barrier layer, and a first pinned layer, in which the first free layer is coupled to the source/drain terminal and the first pinned layer is coupled to a first circuit. The second MTJ includes a second free layer, a second barrier layer, and a second pinned layer, in which the second pinned layer is coupled to the source/drain terminal and the second free layer is coupled to a second circuit.