eMRAM Planarization via Segmented CMP and Etch Back

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Solution Overview

Problem

The use of eMRAM in chip manufacturing leads to significant step height differences between embedded memory regions and other regions on the wafer, resulting in impaired planarization effects due to chemical mechanical polishing (CMP), causing dishing issues.

Innovation Solution

A method involving a memory cell stack structure with a first and second electrode, a magnetic tunnel junction (MTJ) structure, and specific dielectric and metal nitride layers, where a first CMP process uses the metal nitride layer as a stop, followed by an etch back process to expose the first dielectric layer, and a second CMP process to expose the second electrode, improving planarization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a dielectric layer is formed on the memory cell stack structure in the embedded memory region, then the area occupied by the embedded memory region is small, but a large step height difference is created between the embedded memory region and other regions

Engineering Contradiction:

Improvearea of embedded memory regionVSAvoidstep height difference

Core Design Contradiction:

Area of stationary objectVSShape

Solution Approach 1:

The planarization process is divided into multiple stages: first CMP process to initial planarization, etch back process to remove excess material, and second CMP process to final planarization. This segmentation allows each process to address specific aspects of the step height problem without compromising the other.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The etch back process is performed as a preliminary action before the second CMP process. This removes the bulk of the step height difference created by the dielectric layer formation, preparing the surface for the final CMP planarization and preventing serious dishing.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If the dielectric layer is planarized by the chemical mechanical polishing (CMP) method, then planarization is achieved, but serious dishing occurs and the planarization effect is impaired

Engineering Contradiction:

Improveplanarization effectVSAvoiddishing

Core Design Contradiction:

Manufacturing precisionVSShape

Solution Approach 1:

The planarization function is segmented into two separate CMP processes with an etch back process in between. The first CMP process performs initial planarization, the etch back removes excess material that would cause dishing, and the second CMP process completes the planarization. This segmentation prevents the serious dishing that would occur with a single CMP process.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The etch back process acts as an intermediary step between the two CMP processes. It removes the dielectric material that would otherwise be over-polished during CMP, serving as a mediator that prevents dishing while maintaining the planarization benefit.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If a single CMP process is used for planarization, then the process is simple, but the planarization effect is impaired due to dishing

Engineering Contradiction:

Improveplanarization process complexityVSAvoidplanarization effect

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

The planarization process is segmented into three distinct steps (first CMP, etch back, second CMP) rather than using a single CMP process. Although this increases process complexity, it dramatically improves the planarization effect by preventing dishing, making the trade-off worthwhile for achieving the required manufacturing precision.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances planarization by ensuring uniform height of dielectric layers across regions, reducing dishing and improving manufacturing efficiency in eMRAM production.

Implementation Method 1

a first CMP process is performed on the second dielectric layer to expose the metal nitride layer

Methodology Applied

Scientific EffectChemical mechanical polishing:

Implementation Method 2

An etch back process is performed to completely remove the metal nitride layer and expose the first dielectric layer. The etch back process is, for example, a dry etching process with no selectivity.

Methodology Applied

Scientific EffectDry etching:

Implementation Method 3

A second CMP process is performed to expose the second electrode

Methodology Applied

Scientific EffectChemical mechanical polishing:

Data Source

PatentUS10535817B1Method of manufacturing embedded magnetoresistive random access memory

Publication Date: 2020.01.14 UNITED MICROELECTRONICS CORP

AI summary

A method of manufacturing an embedded magnetoresistive random access memory including the following steps is provided. A memory cell stack structure is formed on a substrate structure. The memory cell stack structure includes a first electrode, a second electrode, and a magnetic tunnel junction structure. A first dielectric layer covering the memory cell stack structure is formed. A metal nitride layer is formed on the first dielectric layer. A second dielectric layer is formed on the metal nitride layer. A first CMP process is performed on the second dielectric layer to expose the metal nitride layer by using the metal nitride layer as a stop layer. An etch back process is performed to completely remove the metal nitride layer and expose the first dielectric layer. A second CMP process is performed to expose the second electrode. The manufacturing method can have a better planarization effect.