Emulation Data Array Compaction Circuit for Memory Footprint Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing processor-based emulation systems require large memory footprints due to multiple copies of data for each emulation processor in a cluster, leading to significant power overhead, as most data is not used in subsequent emulation steps.
Innovation Solution
A compaction circuit that stores only data identified by keeptag bits as readable in subsequent steps, translating logical read addresses to physical addresses in a shared data array, and a dynamic modification engine for dynamic netlist modification to adjust data storage based on keeptag changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If multiple memory units with copies of the same data are provided for multiple emulation processor input ports, then read access for multiple processors is enabled, but memory footprint and power overhead increase significantly
Solution Approach 1:
Multiple memory units with identical data copies are merged into a single shared memory unit. The compaction circuit selectively compacts data from multiple source addresses into one shared memory, eliminating redundant storage while maintaining simultaneous read access for multiple emulation processors through the shared memory structure.
Solution Approach 2:
A single shared memory unit serves multiple emulation processors simultaneously, replacing the dedicated memory units for each processor. The memory becomes a universal resource that can be accessed by multiple processors, reducing total memory quantity while maintaining operational capability for all processors.
2Reliability
If multiple copies of data are maintained in memory for each emulation processor, then data availability for multiple processors is ensured, but power consumption increases due to maintaining unused data
Solution Approach 1:
The compaction circuit extracts and identifies only the necessary data bits that need to be stored based on keeptag signals. Data that is not needed by any emulation processor in subsequent steps is excluded from storage, eliminating power overhead associated with maintaining and refreshing unused data while ensuring all required data remains available.
Solution Approach 2:
Data that is determined to be unnecessary for future emulation steps is discarded (not stored in compacted form), while necessary data is recovered and stored. This selective retention strategy reduces the amount of data that must be maintained in memory, thereby reducing power consumption while preserving data availability for needed operations.
3Quantity of substance
If a shared data array is used for multiple emulation processors, then memory footprint is reduced, but address translation from logical to physical addresses is required
Solution Approach 1:
The compaction circuit acts as an intermediary between the emulation processors and the shared data array. It performs the address translation function by converting logical addresses generated by processors into physical addresses in the compacted shared memory, and also handles the data compaction and selection based on keeptag signals. This intermediary approach enables shared memory usage while managing the complexity of address mapping.
4Quantity of substance
If data compaction is implemented using keeptag bits, then only necessary data is stored reducing memory size, but dynamic modification of netlist requires modification of control store words
Solution Approach 1:
The system dynamically modifies control store words and keeptag bits based on netlist changes. When the netlist is modified, the compaction circuit adapts by updating which data bits are marked with keeptag signals for storage, and相应地 updates control store entries. This dynamic adaptation allows the compaction strategy to respond to design changes while maintaining the space-saving benefits of selective data storage.
Data Source
AI summary
A compaction circuit in an emulation system may store in a data array emulation data that may be read in subsequent emulation steps. For each emulation step, the compaction circuit may receive keeptags from a local control store word of the emulation step and store portions of emulation data identified by the keeptags. The keeptags in the control store words may be inserted by a compiler based upon whether a corresponding read port of emulation processor reads the stored data in the subsequent steps. The compaction circuit may also translate the logical read address of the stored data to a physical read address in the shared data array. A dynamic modification engine may enable dynamic modification of netlists while using the compacted data array. In response to a request, the dynamic modification engine may modify one or more keeptags and update read addresses in the control store words.


