Emulation Rollback Circuitry for Communication Link Error Recovery
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Solution Overview
Problem
Reconfigurable hardware modeling devices face significant delays and inefficiencies due to communication link errors, which are not effectively addressed by existing error correction methods like ECC and retransmission, leading to prolonged verification processes in emulation and prototyping.
Innovation Solution
Implementing rollback circuitry in reconfigurable hardware modeling devices to monitor for errors and enable circuits to revert to a previous state upon detection, allowing error-free operations to continue without additional latency or data storage overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction codes (ECC) and retransmission methods are used to address communication link errors, then reliability is improved, but verification time increases significantly
Solution Approach 1:
The patent implements rollback circuitry that pre-captures checkpoint data at predetermined intervals during circuit operation. When an error is detected via error detection codes, the system can immediately revert to a known good checkpoint state without time-consuming retransmission or complex error correction procedures. This preliminary capture of state information enables rapid error recovery and significantly reduces verification time while maintaining reliability.
2Productivity
If rollback circuitry is implemented to enable quick error recovery, then verification speed is improved, but device complexity increases
Solution Approach 1:
The patent divides the circuit operation into discrete segments with checkpoint data captured at predetermined intervals or after specific numbers of operations. This segmentation allows the rollback mechanism to operate on manageable state snapshots rather than requiring complex continuous state management. The segmented approach enables fast error recovery by simply restoring to the last checkpoint while keeping the rollback circuitry relatively simple in structure.
3Reliability
If frequent checkpoints are stored to enable accurate rollback, then error recovery accuracy is improved, but data storage overhead increases
Solution Approach 1:
The patent implements checkpoints at predetermined intervals or after specific numbers of operations rather than after every single operation. This partial checkpointing approach provides sufficient error recovery accuracy for practical purposes while significantly reducing the storage overhead compared to checkpointing every state change. The system captures just enough checkpoint data to enable effective rollback without the excessive storage requirements of continuous checkpointing.
Data Source
AI summary
Each of a plurality of reconfigurable hardware modeling circuits in a reconfigurable hardware modeling device comprises: a plurality of communication ports; error monitoring circuitry configured to monitor, while the reconfigurable hardware modeling device is performing an operation for verifying a circuit design, whether data received from the plurality of communication ports contain an error or not, and send out an error signal indicating the monitoring result; and rollback circuitry configured to, if data received by any of the plurality of reconfigurable hardware modeling circuits contain an error, enable the reconfigurable hardware modeling circuit to repeat the operation from a state before the error is received, and if data received by the plurality of reconfigurable hardware modeling circuits contain no error, allow the reconfigurable hardware modeling circuit to continue the operation.