Hardware Emulator Circuit Verification via Prototype Trace Replication
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Solution Overview
Problem
Complex ASIC and SoC integrated circuits are difficult to validate or test using software simulation alone, as prototyping offers high speed but long setup times and limited debugging, while emulation provides faster setup and better debugging but at the cost of performance.
Innovation Solution
A method and system that simulates a circuit by running a first prototype a predetermined number of cycles behind a second prototype, using a hardware emulator with an input trace to recreate conditions leading to verification errors, allowing for faster debugging and reduced overall verification time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If prototyping is used for hardware-assisted circuit design verification, then high-speed performance is achieved, but time to bring up and debugging capability deteriorate
Solution Approach 1:
The patent applies preliminary action by capturing input traces and design states during prototyping runs before errors occur. The system records input sequences and circuit states in advance, enabling later reproduction of error conditions in emulation without requiring the actual error to occur during the emulation run itself. This preliminary capture of data during high-speed prototyping resolves the contradiction by preparing verification data ahead of time.
Solution Approach 2:
The patent uses copying by creating a replica of the circuit design in emulation hardware based on data captured during prototyping. The system copies the design state and input traces from the prototype environment to the emulation environment, allowing verification of the same design conditions in a different hardware platform with better debugging capabilities. This copying approach enables the system to achieve both high-speed prototyping performance and emulation-level debugging.
2Speed
If prototyping is used for hardware-assisted circuit design verification, then high-speed performance is achieved, but debugging capability deteriorates
Solution Approach 1:
The patent introduces an intermediary mechanism that bridges prototyping and emulation environments. The system uses input trace capture and design state recording as intermediary data structures that transfer information from the high-speed prototype to the debuggable emulation platform. This intermediary layer enables debugging in emulation while maintaining the performance benefits of prototyping, as the intermediary data allows reproduction of prototype conditions without requiring the prototype itself to be debugged.
Solution Approach 2:
The system copies the circuit design state and input sequences from prototype to emulation, enabling the emulation to reproduce exact prototype conditions. This copying allows designers to leverage emulation's superior debugging capabilities while verifying the same high-speed design conditions that were originally tested in prototyping, thus resolving the debugging capability limitation of prototyping.
3Loss of time
If emulation is used for hardware-assisted circuit design verification, then faster time to bring up and better debugging capability are achieved, but performance deteriorates
Solution Approach 1:
The patent applies preliminary action by performing high-speed prototyping runs first to capture input traces and design states before transitioning to emulation. This preliminary prototyping phase establishes the performance baseline and captures verification data, allowing emulation to focus on verification rather than initial setup. The preliminary action of data capture during prototyping enables emulation to achieve fast bring-up time while maintaining relevance to high-speed performance conditions.
4Loss of time
If software simulation is used for circuit validation, then setup time is reduced, but validation capability for complex ASIC and SoC deteriorates
Solution Approach 1:
The patent substitutes mechanical/system-level simulation with hardware-based prototyping and emulation. Instead of relying on software simulation models, the system uses actual hardware prototypes and emulators to validate complex ASIC and SoC designs. This substitution maintains fast setup time characteristics while dramatically improving validation capability by using real hardware behavior rather than software models, thus resolving the contradiction between setup time and validation reliability.
Data Source
AI summary
A method for simulating a circuit includes running a first prototype of the circuit a predetermined number of cycles behind a second prototype of the circuit, and running a hardware emulator of the circuit in accordance with an input trace received by the first prototype and the second prototype.