Emulator Power Analysis Logic Multiplexing Signal Tracking
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Solution Overview
Problem
Conventional emulators require excessive hardware resources and bandwidth to track signal states in digital circuits, leading to inefficient power analysis and limited scalability in emulation processes.
Innovation Solution
The implementation of power analysis logic that multiplexes signal tracking using toggle counting, low state counting, and high state counting logic, reducing hardware resource utilization and communication bandwidth by transmitting state counts only when thresholds are reached, thereby enabling efficient power analysis in an emulation environment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional emulators track states of multiple signals in the DUT, then power analysis capability is achieved, but hardware resources (registers or memories) are excessively consumed
Solution Approach 1:
The patent segments the signal tracking function into two parts: (1) the emulator tracks only essential signal states, and (2) a separate logic unit implemented in the DUT performs detailed state tracking for power analysis. This segmentation allows power analysis capability while reducing emulator hardware resource consumption.
Solution Approach 2:
The patent introduces an intermediary logic unit (power analysis logic) that is implemented within the DUT itself. This intermediary performs the detailed signal state tracking and power analysis calculations, acting as a mediator between the emulator and the power analysis requirements, thereby freeing emulator hardware resources.
2Measurement precision
If emulators track billions of signals for power analysis, then comprehensive power analysis is achieved, but emulation speed is slowed down
Solution Approach 1:
The patent segments the tracking workload by having the emulator handle only essential signal states while the DUT-based power analysis logic handles detailed state tracking. This division allows comprehensive power analysis without slowing down the emulation process, as the emulator is not burdened with tracking billions of signals.
Solution Approach 2:
The patent implements power analysis logic directly within the DUT, enabling the DUT to perform its own power analysis functions. This self-service approach allows comprehensive power analysis to be conducted without external intervention that would slow down the emulation speed.
3Loss of information
If emulators generate large amounts of data from signal tracking, then detailed power analysis data is obtained, but communication bandwidth is excessively consumed
Solution Approach 1:
The patent extracts the detailed signal state tracking and power analysis data generation functions from the emulator and implements them within the DUT. This extraction eliminates the need for the emulator to generate and transfer large amounts of detailed data, thereby reducing communication bandwidth consumption while still obtaining comprehensive power analysis data.
Solution Approach 2:
The patent introduces an intermediary power analysis logic unit within the DUT that processes signal states locally and generates power analysis data internally. This intermediary eliminates the need for extensive data transfer between emulator and host system, reducing communication bandwidth requirements while maintaining detailed power analysis capability.
4Measurement precision
If conventional power analysis transfers all tracked data to host system, then complete power analysis results are achieved, but communication bandwidth requirements increase
Solution Approach 1:
The patent extracts the power analysis data generation function from the emulator and implements it within the DUT. This extraction allows complete power analysis results to be achieved while minimizing data transfer to the host system, thereby reducing communication bandwidth requirements.
Solution Approach 2:
The patent enables the DUT to perform self-service power analysis by implementing power analysis logic within the DUT itself. This self-service capability generates complete power analysis results internally without requiring extensive data transfer to the host system, thus reducing communication bandwidth consumption.
Data Source
AI summary
Embodiments relate to the emulation of circuits, and tracking states of signals in an emulated circuit for performing power analysis. A host system incorporates power analysis logic into a design under test (DUT). An emulator emulates the DUT along with the incorporated power analysis logic. Based on the power analysis logic, during a power analysis clock cycle, the emulator selects a signal from a plurality of signals of the DUT. The emulator determines whether a state event is detected for the selected signal. If the state event is detected, a state count is updated for the selected signal that indicates a number of state events detected for the selected signal during emulation of the DUT. If the state count reaches a threshold number based on the update, the emulator transmits a count update signal to the host system indicating that the state count reached the threshold number.


