Hardware Emulator Shadow Processor Bandwidth Optimization
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Solution Overview
Problem
Hardware emulators face limitations in processor bandwidth utilization, as processors often do not require input data from all read ports, leading to inefficiencies in data usage during emulation steps.
Innovation Solution
The introduction of a shadow processor that performs additional LUT operations by storing unused data from the data array in a register and using it to perform extra LUT functions during emulation steps, thereby optimizing bandwidth usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a processor-based hardware emulator sequentially evaluates combinatorial logic levels, then the emulation can be performed using standard processor architecture, but the processor bandwidth is underutilized because not all read ports are accessed during each emulation step
Solution Approach 1:
The patent creates a shadow processor that is a functional copy of the main processor, capable of performing identical LUT operations. This shadow processor utilizes unused data from the data array by performing additional LUT operations in parallel, effectively copying the processing functionality to exploit otherwise wasted bandwidth capacity
Solution Approach 2:
The shadow processor performs LUT operations in advance during the same emulation step when unused data is available. By preparing results beforehand using idle computational resources, the system maximizes bandwidth utilization without interfering with the main processor's sequential evaluation workflow
2Device complexity
If the processor evaluates functions requiring only two operands from a four-read port data array, then the emulation logic is simplified, but the unused read ports represent wasted bandwidth capacity
Solution Approach 1:
The shadow processor serves itself by utilizing the unused data already present in the data array. Instead of requiring additional data fetching or complex coordination, the shadow processor independently performs LUT operations on the unused operands, making the wasted bandwidth serve a useful purpose automatically
Solution Approach 2:
The patent recovers value from data that would otherwise be discarded or left unused. The unused operands from the main processor's evaluation are captured and reused by the shadow processor to perform additional LUT operations, transforming wasted computational resources into productive output
Data Source
AI summary
A hardware emulator having an emulation unit with a shadow processor is described. The shadow processor is capable of performing an extra look up table (LUT) operation in addition to the LUT operation performed by a processor within the emulation unit. The emulation unit comprises a memory for supplying a first amount of data to a shadow processor register, wherein the shadow processor register stores the first amount of data for later retrieval. The data stored in the shadow processor register function as operands for a truth table stored in the memory and are used to select a function bit out from the memory. The selected function bit out represents a Boolean evaluation of the operands.