Emulator Sync Subsystem Master Slave TCI Hierarchy
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Solution Overview
Problem
Existing emulator systems face inefficiencies in controlling synchronization and execution of large numbers of emulation components, leading to performance issues and increased time required for tasks such as halting or pausing emulation, due to the need to manage numerous devices and maintain synchronization across hundreds or thousands of processors.
Innovation Solution
A synchronization subsystem organized as a logical hierarchy, or 'sync tree,' where one master Timing Control Interface (TCI) controls all slave TCIs, allowing only the master TCI to be manipulated for starting, halting, or pausing execution, thereby reducing the number of devices that need to be accessed for these operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple timing control devices are used to control hundreds or thousands of emulation processors, then synchronization and control coverage are improved, but the complexity of controlling and manipulating each device increases significantly
Solution Approach 1:
The system segments the large number of emulation processors into multiple clusters, each controlled by a dedicated timing control device. This segmentation allows synchronization to be managed at the cluster level rather than individually for each processor, reducing control complexity while maintaining synchronization reliability across the entire system.
Solution Approach 2:
The patent introduces a master timing control device as an intermediary that coordinates all slave timing control devices. The master device receives control signals and distributes synchronized timing commands to all slave devices, which then control their respective processor clusters. This intermediary structure simplifies the control architecture by providing a single point of coordination rather than requiring direct control of each individual device.
2Ease of operation
If all timing control devices are manipulated to start or halt emulation, then precise control over each processor is achieved, but the time required to perform these operations increases substantially
Solution Approach 1:
The patent merges the control functions of all slave timing control devices under a single master timing control device. Instead of manipulating each slave device independently to start or halt emulation, the master device issues a single command that is propagated to all slave devices simultaneously. This merging of control functions maintains precise control over all processors while dramatically reducing the time required for operation.
Solution Approach 2:
The master timing control device serves multiple functions: it controls all slave timing control devices, coordinates synchronization across all processor clusters, and provides a unified interface for starting, halting, and pausing emulation. This multi-functional approach eliminates the need to manipulate multiple separate devices for each control operation, reducing operation time while maintaining control precision.
3Adaptability or versatility
If numerous devices are accessed to control emulation execution, then comprehensive control coverage is achieved, but the efficiency of manipulation and overall system performance deteriorates
Solution Approach 1:
The master timing control device acts as an intermediary that provides comprehensive control coverage over all emulation processors while improving manipulation efficiency. Instead of accessing numerous slave devices directly, the controller accesses the single master device, which then propagates commands to all subordinate devices. This intermediary approach maintains full control coverage across the entire system while significantly improving manipulation efficiency by reducing the number of direct access points required.
Data Source
AI summary
Embodiments described herein include an emulator system having a synchronization subsystem comprising devices, organized in logical hierarchy, controlling synchronization of a system clock and system components during emulation execution. The devices of the logical hierarchy communicate bi-directionally, communicating status indicators upwards and execution instructions downwards. A TCI is designated “master TCI” and others are designated “slave TCIs.” The master TCI asserts a RDY status that propagates upwards to a root node for a number cycles. The slave TCIs execute in “infinite run” and continually assert the RDY status upwards to the root device regardless of the cycle count. The root node detects each RDY status and propagates downwards a GO instruction to the master TCI and the slave TCIs. In this way, the TCIs execute until the master TCI de-asserts RDY status. The result is only the master TCI is manipulated to, for example, start/stop emulation or perform iterative execution.