Emulator Waveform Reconstruction Using Parallel Computing Grid
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional emulation systems face limitations in speed and resource utilization due to the need to dump large amounts of sequential and combinational signals, leading to slow data transfer and increased hardware requirements, or slow reconstruction of combinational signals using multiple parallel event-based simulators.
Innovation Solution
Identifying a minimal set of sequential and combinational signals needed for full reconstruction post-emulation, using a parallel computing grid for efficient reconstruction of combinational waveforms and minimizing emulator resources, and implementing techniques like loop breaking, multi-processor based calculation, back trace invalidation, time-slicing, and data dump barriers to optimize data transfer and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If all sequential and combinational signals are dumped from the emulator, then complete waveform data is obtained for post-emulation analysis, but the data transfer speed becomes slow due to bandwidth limits
Solution Approach 1:
The patent extracts only the essential sequential signals from the emulator for dumping, while combinational signals are reconstructed offline. This selective extraction approach maintains waveform data completeness for analysis while significantly reducing the data transfer burden and improving speed.
Solution Approach 2:
The patent segments the waveform reconstruction process into two parts: (1) dumping sequential signals during emulation, and (2) reconstructing combinational signals offline using parallel event-based simulators. This segmentation allows optimized handling of each signal type according to its characteristics.
2Loss of information
If all sequential and combinational signals are dumped from the emulator, then complete waveform data is obtained, but additional hardware resources inside the emulator are required causing capacity or speed problems
Solution Approach 1:
The patent extracts only sequential signals for hardware dumping, removing the need to handle combinational signals through emulator hardware. This extraction principle reduces hardware resource requirements while maintaining complete waveform reconstruction capability through offline processing.
3Device complexity
If only sequential elements are dumped and combinational signals are reconstructed offline using multiple parallel event-based simulators, then emulator resources are reduced, but the reconstruction process becomes slow
Solution Approach 1:
The patent merges multiple parallel event-based simulators to work concurrently on reconstructing combinational signals. This parallel processing approach compensates for the slower offline reconstruction by distributing the workload across multiple processors, thereby improving overall reconstruction productivity.
4Speed
If a minimal subset of sequential and combinational elements is output from the emulator, then emulator speed is maximized and resource utilization is limited, but complete waveform reconstruction must be achieved
Solution Approach 1:
The patent extracts only the minimal necessary sequential signals for emulator output, while relying on offline reconstruction for combinational signals. This extraction strategy maximizes emulator speed by minimizing output volume while ensuring complete waveform reconstruction through the combination of dumped sequential data and reconstructed combinational data.
Data Source
AI summary
A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.