Nozzle-Controlled Encapsulant Cooling for Semiconductor Warpage

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Solution Overview

Problem

Wafers and strip-level semiconductor packaging face warpage issues due to encapsulation and redistribution processes, affecting yield, reliability, costs, and handling.

Innovation Solution

A cooling fixture with nozzles and a control unit that systematically cools encapsulated semiconductor assemblies by controlling fluid flow rate, temperature, and duration to achieve desired flatness, using sensors for feedback to adjust the cooling process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If encapsulation and redistribution processes are performed on wafer-level and strip-level semiconductor packaging, then connections to semiconductor die can be formed, but warpage occurs affecting yield, reliability, and handling

Engineering Contradiction:
Improveconnection formation capabilityVSAvoidflatness control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing cooling treatment on the encapsulated semiconductor wafer before subsequent redistribution and connection formation processes. The cooling fixture is applied immediately after encapsulation to prevent warpage from developing, thereby maintaining flatness for later processing steps while still enabling connection formation capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by controlling temperature parameters during the encapsulation and cooling processes. By rapidly changing the temperature parameter after encapsulation (cooling from processing temperature to ambient temperature), the thermal stress causing warpage is minimized, thus maintaining manufacturing precision while enabling the encapsulation process.

Inventive Principle:
Principle #35Parameter changes

2Temperature

If uniform cooling is applied to encapsulated semiconductor assemblies, then overall temperature reduction is achieved, but non-uniform warpage persists due to localized thermal stress

Engineering Contradiction:
Improveoverall cooling efficiencyVSAvoidflatness uniformity
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by dividing the cooling process into localized zones with independent temperature control. The cooling fixture includes multiple heating/cooling elements that can be independently controlled to address specific warpage regions, thereby achieving both overall cooling efficiency and flatness uniformity across different areas of the semiconductor wafer.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes dynamics by implementing a dynamic cooling control system that adjusts cooling parameters in real-time based on feedback from sensors. The system can adapt cooling rates and temperatures dynamically during the process, allowing uniform cooling overall while compensating for localized thermal stress variations that cause non-uniform warpage.

Inventive Principle:
Principle #15Dynamics

3Manufacturing precision

If rapid cooling is applied after encapsulation, then warpage is minimized, but thermal shock may damage the semiconductor die

Engineering Contradiction:
Improvewarpage controlVSAvoiddie integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies periodic action by implementing a multi-stage cooling process with different cooling rates at different time periods. The cooling occurs in phases: initial rapid cooling to reduce warpage, followed by slower cooling stages to allow thermal equilibrium and prevent thermal shock damage to the die, thereby maintaining both warpage control and die integrity.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent uses beforehand cushioning by providing gradual thermal transition through controlled cooling rates. The cooling system is designed to cushion the thermal stress on the semiconductor die by progressively reducing temperature rather than applying abrupt rapid cooling, thus minimizing warpage while protecting die integrity from thermal shock damage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The controlled cooling process ensures planar sensitivity, improving yield, reliability, and handling by minimizing warpage and enabling subsequent planar-sensitive processing layers.

Implementation Method 1

A cooling fixture includes a plurality of nozzles configured to systematically cool an encapsulated semiconductor device assembly. A control unit coupled to the cooling fixture controls properties such as fluid flow rate, fluid temperature, and duration of fluid exiting the nozzles.

Methodology Applied
Scientific EffectForced Convection: Forced Convection

Data Source

PatentUS20250006511A1Semiconductor device packaging warpage control
Publication Date: 2025.01.02 NXP USA INC
  • US20250006511A1 patent drawing
  • US20250006511A1 patent drawing
  • US20250006511A1 patent drawing

AI summary

A method of manufacturing a packaged semiconductor device is provided. The method includes placing a plurality of semiconductor die on a carrier substrate. The plurality of semiconductor die and an exposed portion of the carrier substrate are encapsulated with an encapsulant. A cooling fixture includes a plurality of nozzles and is placed over the encapsulant. The encapsulant is cooled by way of air exiting the plurality of nozzles. A property of air exiting a first nozzle of the plurality of nozzles is different from that of a second nozzle of the plurality of nozzles.