Encapsulant Protection for Wafer-Level Chip Scale Packaging Yield

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Solution Overview

Problem

Wafer level chip scale packaging (WLCSP) technologies face issues with the structural strength of semiconductor elements, leading to cracking and delamination of conductive elements during processing, which reduces product yield in surface mount technology (SMT) applications.

Innovation Solution

The method involves forming openings in separation portions of a substrate, applying an encapsulant on the active surfaces of electronic elements, and singulating along inactive surfaces, enhancing structural strength and allowing for pre-singulation testing to identify defective elements, thereby preventing cracking and improving yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor elements are disposed on adhesive layer and tested before separation, then testing can be performed, but cracking occurs to semiconductor elements during processing due to low structural strength

Engineering Contradiction:
Improveproduct yieldVSAvoidstructural strength of semiconductor elements
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

An encapsulant is formed over the semiconductor elements before separation and testing processes. This encapsulant acts as a protective cushion that prevents cracking of the semiconductor elements during handling and processing, thereby maintaining high structural strength while enabling reliable testing and improving overall product yield

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Ease of manufacture

If active surfaces of semiconductor elements are exposed for RDL process, then electrical connection can be established, but conductive elements easily delaminate from semiconductor elements

Engineering Contradiction:
ImproveRDL process capabilityVSAvoidconductive element attachment
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The encapsulant is formed beforehand to protect the semiconductor elements and conductive elements. This protective layer prevents delamination of conductive elements from the semiconductor elements while still allowing the RDL process to be performed on the exposed active surfaces for establishing electrical connections

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Productivity

If semiconductor elements are separated early for individual processing, then individual packaging is achieved, but cracking cannot be detected and product yield is reduced

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidcrack detection capability
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

Testing is performed on the semiconductor elements while they are still attached to the substrate in an array configuration, before separation into individual elements. This preliminary action allows for detection of cracked elements that would be difficult to detect after separation, enabling removal of defective elements and improvement of overall product yield while maintaining processing efficiency

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10224243B2Method of fabricating electronic package
Publication Date: 2019.03.05 SILICONWARE PRECISION IND CO LTD
  • US10224243B2 patent drawing
  • US10224243B2 patent drawing
  • US10224243B2 patent drawing

AI summary

An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface opposite to the active surface, and a side surface adjacent to and connecting the active and inactive surfaces; a plurality of conductive elements formed on the electrode pads of the electronic element; and an encapsulant covering the active and side surfaces of the electronic element and portions of side surfaces of the conductive elements and exposing the inactive surface of the electronic element. Therefore, the invention enhances the structural strength of the active surface of the electronic element so as to prevent cracking of the electronic element and hence avoid delamination of the conductive elements from the electronic element.