Encapsulated Interconnect Structure With Self-Aligned Etch Stop Layer
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Solution Overview
Problem
In the semiconductor industry, as devices shrink to nanometer technology process nodes, forming efficient interconnect structures in FinFETs poses challenges due to the need for reduced resistance and improved reliability, particularly in achieving precise via-to-line overlay and preventing damage during etching processes.
Innovation Solution
The method involves forming a self-aligned etching stop layer that acts as a glue layer to adhere the metal bulk layer directly to the dielectric layer, eliminating the need for additional conductive glue layers and using a blocking layer with amphiphilic organic molecules to enhance deposition selectivity, along with a conformal etching stop layer to protect the interconnect structure during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional multilayer interconnect structure with separate conductive glue layers is used, then adhesion between metal bulk layer and dielectric layer is achieved, but the resistance of the interconnect structure increases and device performance deteriorates
Solution Approach 1:
The patent combines the etching stop layer and the adhesion promoter layer into a single integrated layer. This etching stop layer contains amphiphilic organic molecules that provide both the etching stop function and the adhesion promotion function, eliminating the need for a separate conductive glue layer and reducing overall resistance while maintaining adhesion.
Solution Approach 2:
The etching stop layer is designed to perform multiple functions simultaneously: it acts as an etching stop layer to protect underlying layers during etching processes, and it contains amphiphilic organic molecules that serve as an adhesion promoter to enhance bonding between the metal bulk layer and dielectric layer, replacing multiple separate functional layers.
2Reliability
If additional conductive glue layers are added to improve adhesion, then reliability of the interconnect structure improves, but device complexity and manufacturing steps increase
Solution Approach 1:
The patent merges the etching stop layer and adhesion promoter layer into a single integrated layer, reducing the total number of layers in the interconnect structure and simplifying the manufacturing process while maintaining both adhesion and etching protection functions.
Solution Approach 2:
The etching stop layer is designed with multi-functionality, simultaneously providing etching protection and adhesion promotion through the incorporation of amphiphilic organic molecules, thereby eliminating the need for separate functional layers and reducing manufacturing complexity.
3Ease of manufacture
If standard etching processes are used without protective layers, then manufacturing simplicity is maintained, but the interconnect structure suffers damage during etching
Solution Approach 1:
The etching stop layer is formed in advance before the metal bulk layer deposition, creating a protective barrier that prevents damage to underlying layers during subsequent etching processes. This preliminary protective action allows for standard etching processes to be used without causing damage.
Solution Approach 2:
The etching stop layer acts as a cushioning protective layer that absorbs or prevents the harmful effects of etching processes on underlying sensitive layers. This beforehand protection enables the use of aggressive etching chemistry without damaging the interconnect structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the resistance of the multilayer interconnect structure, enhances the performance of semiconductor devices by improving via-to-line overlay and reliability, and protects the interconnect layers from damage during etching processes.
Implementation Method 1
forming a blocking layer with amphiphilic organic molecules to enhance deposition selectivity
Implementation Method 2
forming a self-aligned etching stop layer that acts as a glue layer to adhere the metal bulk layer directly to the dielectric layer
Data Source
AI summary
An interconnect structure is provided. The interconnect structure includes a first via in a first dielectric layer, a first metal line on and electrically connected to the first via, a first etching stop layer over the first dielectric layer, a second metal line over the first etching stop layer, and an encapsulating layer. The encapsulating layer includes a first vertical portion along a sidewall of the first metal line, a horizontal portion along an upper surface of the first etching stop layer, and a second vertical portion along a sidewall of the second metal line. The interconnect structure also includes a second dielectric layer nested within the encapsulating layer.


