Encoded Address Lookup Table for DDR Memory Space Reduction
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Solution Overview
Problem
Traditional data storage devices, such as those with double data rate (DDR) memory, inefficiently use physical memory addresses, requiring 11 bits for each memory block but only utilizing 10 bits, leading to wasted space and increased costs due to unnecessary physical address entries.
Innovation Solution
A logical to encoded value lookup table is created, where physical memory addresses are encoded into smaller values, reducing the required space from 11 bits to 10 bits per memory block, optimizing memory usage and reducing the overall size of the data storage device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional physical memory addresses with 11 bits are used for each memory block, then the addressing capacity is sufficient to cover all possible word lines and strings, but the DDR memory space is inefficiently utilized with wasted bits
Solution Approach 1:
The patent changes the parameter of address representation from fixed 11-bit physical addresses to variable-length encoded values. By analyzing the actual distribution of used word lines and strings, the system encodes only the necessary addressing information, reducing the average bit length from 11 to approximately 10 bits per memory block while maintaining full addressing capacity for all possible configurations.
Solution Approach 2:
The patent extracts and removes the redundant unused bit from the 11-bit physical address structure. By identifying that only 10 bits are actually needed to address the maximum configuration of 160 word lines and 5 strings, the system extracts the unnecessary overhead and eliminates it through the encoded value approach, improving space efficiency without sacrificing addressing capability.
2Adaptability or versatility
If 11 bits of space are allocated for each memory block in DDR memory, then all possible word lines and strings can be addressed, but the cost of DDR memory increases due to unused capacity
Solution Approach 1:
The patent changes the parameter of address storage from fixed-width 11-bit values to variable-length encoded values that match the actual addressing needs. This parameter change allows the system to maintain full addressing coverage for all possible word line and string configurations while reducing the average storage requirement to approximately 10 bits per block, directly lowering DDR memory capacity requirements and production costs.
Solution Approach 2:
Instead of allocating full 11 bits for every memory block entry (excessive action), the patent uses partial encoding that provides exactly the addressing capacity needed for each specific configuration. The encoded values use only the necessary number of bits to represent the actual word lines and strings in use, avoiding the waste of allocating excessive capacity uniformly across all entries.
3Measurement precision
If a conventional logical to physical lookup table is used, then all physical memory addresses are stored with full precision, but the table size is larger than necessary due to unused address spaces
Solution Approach 1:
The patent changes the parameter of address representation in the lookup table from fixed 11-bit physical addresses to variable-length encoded values. This transformation maintains the precision needed to uniquely identify each used memory location while reducing the average storage requirement per entry. The encoded values preserve all necessary addressing information for the actual word lines and strings in use, eliminating redundant bits and reducing overall table size.
Solution Approach 2:
The patent creates a compressed representation (encoded values) that copies only the essential addressing information from the full physical addresses. Instead of storing complete 11-bit addresses in the lookup table, the system stores encoded versions that replicate the necessary addressing functionality using fewer bits, effectively creating a space-efficient copy of the address mapping information.
Data Source
AI summary
A data storage device including, in one implementation, a memory device and a controller configured to configured to retrieve a plurality of physical memory addresses from a first lookup table in the non-volatile memory. Each physical memory address is a combination of a word line and a string number of the non-volatile memory and the each physical memory address has a first number of bits. The controller is further configured to generate a plurality of encoded values by encoding the plurality of physical memory addresses. Each of the plurality of encoded values has a second number of bits that is smaller than the first number of bits. The controller is further configured to store the plurality of encoded values in the first lookup table, generate a logical to encoded value look-up table with the plurality of encoded values, and store the logical to encoded value look-up table in the memory.