Encoded Sync Clocking for Multi-Phase Current Balancing
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Solution Overview
Problem
Current balancing in multi-phase power converters is complex and incompatible with internally compensated devices, as existing methods require external trimming circuits and compromise on control voltage sharing.
Innovation Solution
A circuit that uses the internal synchronization signals of multi-phase power converters to encode current balancing information onto clock signals, allowing precise replication of inductor current among channels without external control voltage access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external trimming circuits are used for current balancing, then current distribution can be adjusted, but device complexity increases and compatibility with internally compensated devices is lost
Solution Approach 1:
The system uses each converter's own synchronization signal to carry its current balancing information, eliminating the need for external trimming circuits. The converter independently modulates its synchronization signal with its control voltage, achieving self-service current balancing without adding external components.
Solution Approach 2:
The synchronization signal serves dual purposes: it provides timing synchronization for the converter operation and simultaneously carries current balancing information through modulation. This multi-functionality eliminates the need for separate external trimming circuits while maintaining current balancing capability.
2Reliability
If control voltage is shared externally among converters, then current balancing can be achieved, but adaptability to different converter configurations is reduced
Solution Approach 1:
The synchronization signal acts as an intermediary carrier that transports control voltage information between converters without requiring direct control voltage sharing. Each converter modulates its synchronization signal with its control voltage, and other converters extract the necessary information, enabling current balancing while maintaining configurational flexibility.
Solution Approach 2:
The system changes the parameters of the synchronization signal (amplitude, duty cycle, or frequency) to encode control voltage information. This parameter modulation allows current balancing information to be transmitted adaptively to different converter configurations without requiring external control voltage access.
3Device complexity
If synchronization signals are used to carry current balancing information, then device complexity is reduced, but measurement precision of clock signal parameters is required
Solution Approach 1:
Each converter monitors the synchronization signals from other converters, extracts the modulated control voltage information, and uses this feedback to adjust its own operation. This feedback mechanism enables precise current balancing while keeping the circuit complexity low, as the precision requirement is met through continuous adaptive adjustment rather than high-precision fixed measurement.
Data Source
AI summary
Current balancing techniques. In an example, a circuit includes a synchronization terminal, an error amplifier, and a clock generator. The error amplifier is configured to generate a first control voltage signal based on a reference voltage and a power converter output voltage. The clock generator is configured to produce an outgoing clock signal having an outgoing clock frequency. The circuit further includes an encoder, a frequency detector, and a decoder. The encoder is coupled to the clock generator and synchronization terminal, and configured to encode the outgoing clock signal based on the first control voltage signal to provide, at synchronization terminal, an outgoing encoded clock signal. The frequency detector is coupled to synchronization terminal and configured to derive, from an incoming encoded clock signal, an incoming clock frequency. The decoder is coupled to synchronization terminal and configured to derive, from the incoming encoded clock signal, a second control voltage signal.


