Encoder Engine Clock Frequency Dynamic Adjustment

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Solution Overview

Problem

Conventional digital camera encoder engines consume excessive power due to maintaining a fixed maximum clock frequency, even when video data is processed at low rates, leading to idle cycles and increased core power consumption.

Innovation Solution

A computer-implemented method that dynamically adjusts the clock frequency of the encoder engine based on the number of buffers occupied by video data, reducing idle cycles and power consumption by scaling the clock frequency accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the encoder engine maintains a pre-set maximum clock frequency to prevent buffer overflow, then the buffer overflow risk is reduced, but the power consumption increases due to idle clock cycles

Engineering Contradiction:

Improvebuffer overflow preventionVSAvoidencoder engine power consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The encoder engine's clock frequency is dynamically adjusted based on the actual data arrival rate at the buffer. When data arrives at low rates, the clock frequency is reduced to minimize idle cycles and power consumption. When data arrives at high rates, the frequency increases to prevent buffer overflow. This dynamic adaptation resolves the contradiction by making the system flexible rather than fixed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter (clock frequency) of the encoder engine based on buffer occupancy conditions. By monitoring how full the buffer is and adjusting the frequency accordingly, the system optimizes the balance between preventing overflow and reducing power consumption during idle periods.

Inventive Principle:

Principle #35Parameter changes

2Power

If the core power is increased to support the encoder engine operating at maximum frequency, then the encoder engine can maintain maximum performance, but other components consume unnecessary power

Engineering Contradiction:

Improveencoder engine performanceVSAvoidwasted core power

Core Design Contradiction:

PowerVSLoss of energy

Solution Approach 1:

The core power supply to the encoder engine is dynamically adjusted rather than maintained at a fixed maximum level. The power adjustment follows the actual workload demands, allowing the core to operate at lower power levels during low-activity periods while still providing maximum power when needed, thus eliminating wasted energy on other components.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The encoder engine and its power supply system self-regulate based on actual processing needs. The system automatically adjusts power allocation without external intervention, ensuring that power is only consumed when and where it is actually needed for encoding operations.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS9986159B2Technique for reducing the power consumption for a video encoder engine

Publication Date: 2018.05.29 NVIDIA CORP

AI summary

Raw video data is captured, processed, and then stored within a set of buffers. An encoder engine is configured to encode the video data for storage. A feedback controller dynamically adjusts the clock frequency of the encoder engine based on the number of buffers currently occupied by the video data. The feedback controller is tuned so that the clock frequency of the encoder engine will be increased when the number of buffers occupied by video data increases, and the clock frequency of the encoder engine will be decreased when the number of buffers occupied by the video data decreases.