Video Encoder Interpolation Filter Switching for Prediction Accuracy

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Solution Overview

Problem

Current video coding technologies, such as H.265/HEVC, face challenges in optimizing encoding and decoding processes for the increasing amount of digital video data, particularly in balancing processing load and prediction accuracy.

Innovation Solution

An encoder and decoder that dynamically switch between interpolation filters based on affine mode and block size to generate prediction images with fractional-pel precision, using either an 8-tap or 6-tap filter to reduce processing load and improve prediction accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an 8-tap interpolation filter is used to generate fraction-pel precision prediction images, then prediction accuracy is improved, but processing load and memory bandwidth increase

Engineering Contradiction:
Improveprediction accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies dynamics by making the interpolation filter adaptable rather than fixed. The system dynamically selects between 8-tap and 6-tap filters based on the affine mode flag and block size, allowing the processing system to adjust its complexity in real-time according to the specific encoding requirements of each block.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of filter tap count based on specific conditions. When the affine mode is not used and block size is 16×16 or larger, a 6-tap filter is used; otherwise, an 8-tap filter is used. This parameter adaptation resolves the contradiction by optimizing the balance between accuracy and processing load for different scenarios.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If an 8-tap interpolation filter is used to generate fraction-pel precision prediction images, then prediction accuracy is improved, but memory bandwidth consumption increases

Engineering Contradiction:
Improveprediction accuracyVSAvoidmemory bandwidth
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent changes the filter tap count parameter to control memory bandwidth consumption. By using a 6-tap filter instead of 8-tap filter in appropriate scenarios (when affine mode is not used and block size is sufficient), the system reduces the number of memory accesses required for interpolation, thereby reducing memory bandwidth consumption while maintaining adequate prediction accuracy.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If different interpolation filters are used based on affine mode and block size, then encoding efficiency is improved, but device complexity increases

Engineering Contradiction:
Improveencoding efficiencyVSAvoidfilter selection complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by making the filter selection decision local to each block based on its specific characteristics (affine mode flag and block size). Each block is evaluated independently and assigned the appropriate filter type, allowing the system to optimize encoding efficiency for each local region without requiring complex global optimization.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses simple parameter-based decision logic to select filters. The selection depends on two parameters: the affine mode flag and block size. This straightforward parameter-based approach improves encoding efficiency through adaptive filtering while keeping the decision logic simple and easy to implement, thus not significantly increasing device complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20210360239A1Encoder, decoder, encoding method, and decoding method
Publication Date: 2021.11.18 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US20210360239A1 patent drawing
  • US20210360239A1 patent drawing
  • US20210360239A1 patent drawing

AI summary

An encoder comprises: a processor; and memory coupled to the processor, in which in operation, the processor: generates a first prediction image having full-pel precision, based on a motion vector of the current block; generates a second prediction image having fraction-pel precision by interpolating a value at a fraction-pel position between full-pel positions included in the first prediction image, using a first interpolation filter or a second interpolation filter differing in a total number of taps from the first interpolation filter; and encodes the current block based on the second prediction image, and in the generating of the second prediction image, the processor switches between using the first interpolation filter and the second interpolation filter depending on whether an affine mode is used for the current block.