Video Encoder Syntax Structure Switching for Coding Efficiency

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Solution Overview

Problem

Current video coding technologies face challenges in optimizing processing efficiency and reducing processing delay while managing increasing digital video data volumes, particularly in switching between arithmetic encoding and bypass modes, which can lead to increased circuit complexity and code size.

Innovation Solution

An encoder and decoder system that dynamically switches between two syntax structures based on conditions such as orthogonal transform skipping and Context-based Adaptive Binary Arithmetic Coding (CABAC) modes, allowing for collective application of arithmetic encoding/decoding across larger units like slices or pictures, thereby reducing processing delay and code size while maintaining efficient circuit scale.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If arithmetic encoding is applied to binary data string, then coding efficiency is improved, but processing delay increases

Engineering Contradiction:
Improvecoding efficiencyVSAvoidprocessing delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the encoding process by introducing an intermediate binarization stage that produces syntax elements organized in specific structures (e.g., coefficient groups, blocks). This segmentation allows the arithmetic encoding to be applied in a structured manner that improves efficiency while enabling parallel processing and optimization of the encoding pipeline, thereby reducing processing delay.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary binarization of coefficient information into standardized syntax structures before arithmetic encoding. This preliminary organization of data into predictable patterns (such as exponent-run-level structures) prepares the data for more efficient arithmetic encoding processing, reducing the computational complexity and time required during the actual encoding phase.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If different syntax structures are used for arithmetic encoding and bypass modes, then coding efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvecoding efficiencyVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent defines a universal syntax structure for binarized coefficient information that serves both arithmetic encoding and bypass modes. This unified structure uses the same binarization rules and syntax element organization regardless of the subsequent encoding method, allowing a single circuit implementation to handle both modes without requiring separate processing paths, thereby reducing device complexity while maintaining coding efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If arithmetic encoding is applied to every binary data string, then coding efficiency is improved, but code size increases

Engineering Contradiction:
Improvecoding efficiencyVSAvoidcode size
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent introduces dynamic mode selection where the encoding method (arithmetic encoding or bypass) is chosen adaptively for different binary data strings based on characteristics such as entropy, complexity, or importance. This dynamic approach allows arithmetic encoding to be applied selectively to data segments that benefit most from compression, while using simpler bypass encoding for segments where it provides minimal benefit, thereby improving overall coding efficiency without excessively increasing code size.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11812024B2Encoder, decoder, encoding method, and decoding method
Publication Date: 2023.11.07 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US11812024B2 patent drawing
  • US11812024B2 patent drawing
  • US11812024B2 patent drawing

AI summary

An encoder includes circuitry and memory connected thereto. The circuitry, in operation: encodes an image; when encoding the image: binarizes coefficient information of the image; controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and outputs a bitstream including the binary data string to which arithmetic encoding has been applied or has not been applied; and when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is to be applied to the binary data string and a determined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is to be applied to the binary data string and the determined condition is satisfied; and binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is to be applied to the binary data string.