Encryption/Decryption Verification Architecture for Byte Transformation Errors
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Solution Overview
Problem
Existing encryption/decryption devices lack effective mechanisms to verify the correctness of encryption and decryption processes, particularly in the presence of errors or attacks, which compromises the security of the encrypted data.
Innovation Solution
The proposed encryption/decryption device incorporates a verification mechanism that includes a ShiftRow/InvShiftRow unit, a SubBytes/InvSubBytes unit, a dual ShiftRow/InvShiftRow unit, an encoder, a decoder, and a verification unit to detect errors in byte replacement transformations, binary field multiplications, and data transmission processes, ensuring the security of the encryption and decryption procedures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a verification mechanism is added to detect errors in encryption/decryption operations, then security and reliability are improved, but device complexity increases
Solution Approach 1:
The verification mechanism is divided into separate functional units: a first verification unit for byte replacement transformation verification, a second verification unit for binary field multiplication verification, and a controller for coordinating verification operations. This segmentation allows the verification functionality to be integrated without requiring complete redesign of the encryption/decryption device architecture.
Solution Approach 2:
The verification units perform error detection during the encryption and decryption operations themselves, rather than as a separate post-processing step. The first verification unit verifies byte replacement transformations as they occur, and the second verification unit verifies binary field multiplications in real-time, allowing errors to be detected immediately when they occur.
2Reliability
If verification operations are performed during encryption and decryption, then error detection capability is improved, but processing speed decreases
Solution Approach 1:
The verification operations are performed continuously during the normal encryption and decryption processes without interrupting the data flow. The first verification unit continuously verifies byte replacement transformations as data passes through the SubBytes/InvSubBytes units, and the second verification unit continuously verifies binary field multiplications during MixColumns/InvMixColumns operations, ensuring that verification is an integrated part of the processing pipeline rather than a separate batch operation.
Solution Approach 2:
The encryption/decryption device performs self-verification through integrated verification units that monitor and check the correctness of operations as they occur. The device essentially verifies its own operations internally during normal processing, eliminating the need for separate external verification systems that would add significant processing overhead.
3Measurement precision
If multiple verification units are added to verify different transformation operations, then measurement precision of error detection is improved, but device complexity increases
Solution Approach 1:
Different verification units are designed with specialized functions tailored to specific transformation operations: the first verification unit is optimized for verifying byte replacement transformations in SubBytes/InvSubBytes operations, while the second verification unit is optimized for verifying binary field multiplications in MixColumns/InvMixColumns operations. This localized specialization allows each verification unit to achieve high detection precision for its specific function without requiring all verification units to be universally complex.
Solution Approach 2:
The controller serves multiple functions: it coordinates the first verification unit, the second verification unit, and the overall encryption/decryption operations. This multi-functionality reduces the need for separate control mechanisms for each verification unit, thereby managing device complexity while maintaining comprehensive verification capability across different transformation operations.
Data Source
AI summary
An encryption and decryption device includes a ShiftRow/InvShiftRow unit, a SubBytes/InvSubBytes unit, a dual ShiftRow/InvShiftRow unit, an encoder, a decoder, and a first verification unit. The ShiftRow/InvShiftRow unit performs a row shift/inverse row shift operation on result data to generate an input state array. The subbytes/invsubbytes unit performs a transformation on the input state array to generate an output state array. The dual ShiftRow/InvShiftRow unit performs the row shift/inverse row shift operation on dual output data to generate a dual input state array. The encoder encodes the dual input state to generate encoded data. The decoder decodes the encoded data to generate decoded data. The first verification unit verifies the mapping relationship of the decoded data and the output state array to generate a first verification signal.