ENEPIG Surface Finish for Embedded Die Solder Joint Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Embedding circuit components within package substrates is challenging due to thickness mismatches leading to tilting or shifting, and existing surface finishes like ENEPIG and PdAu plating face issues such as copper diffusion, brittle inter-metallic compound formation, and bath life concerns, affecting solder joint reliability and maximum current limits.
Innovation Solution
Implementing electroless nickel-electroless palladium-immersion gold (ENEPIG) or immersion gold-electroless palladium-immersion gold (IGEPIG) surface finishes, optionally with additional layers of indium or cobalt-iron, to address solder joint reliability and maximum current limitations, while reducing the need for additional lithography steps and ensuring uniform coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ENEPIG or PdAu plating is used as surface finish, then solder joint reliability is improved, but copper diffusion and brittle inter-metallic compound formation occur
Solution Approach 1:
The patent introduces an intermediary layer of nickel between the copper substrate and the palladium-gold surface finish. This nickel layer acts as a diffusion barrier that prevents copper atoms from migrating into the PdAu layers, thereby eliminating the harmful copper diffusion and brittle inter-metallic compound formation while maintaining the solder joint reliability provided by the PdAu surface finish.
Solution Approach 2:
The patent employs a composite surface finish structure consisting of multiple layers: a nickel layer combined with a PdAu plating layer. This composite structure leverages the advantages of both materials - the nickel provides copper diffusion barrier properties while the PdAu layer provides excellent solder wettability and joint reliability, creating a synergistic effect that resolves the technical contradiction.
2Manufacturing precision
If additional lithography steps are implemented to address surface finish issues, then manufacturing precision is improved, but device complexity and production time increase
Solution Approach 1:
The patent extracts the surface finish formation process from the lithography sequence by implementing a sequential plating approach (nickel plating followed by PdAu plating) that does not require additional lithography steps. This separates the surface finish application from the pattern definition steps, achieving uniform surface coverage without increasing device complexity or production time.
Solution Approach 2:
The patent employs electroless nickel plating and electroless PdAu plating processes that automatically deposit uniform layers without requiring additional lithography patterning. The electroless plating chemistry self-regulates to provide even coverage across the substrate surface, achieving manufacturing precision through the inherent properties of the deposition process rather than through complex lithographic control.
3Reliability
If thicker palladium and gold layers are used to prevent copper oxidation, then reliability is improved, but PdSn4 and AuSn4 alloy formation increases brittleness
Solution Approach 1:
The nickel layer serves as an intermediary barrier between copper and the PdAu surface finish, preventing direct interaction between copper and tin during soldering. This eliminates the formation of brittle PdSn4 and AuSn4 inter-metallic compounds at the copper-PdAu interface, allowing the use of optimal PdAu thickness for oxidation protection without incurring the penalty of excessive brittleness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances solder joint reliability, reduces brittle inter-metallic compound formation, and improves wettability, providing cost-effective and efficient integration of embedded interconnect bridge circuitry dies with improved electrical connections.
Implementation Method 1
forming a first surface finish layer on the subset of conductive contacts, the first surface finish layer comprising nickel
Implementation Method 2
forming a second surface finish layer on the first surface finish layer, the second surface finish layer comprising palladium
Implementation Method 3
forming a third surface finish layer on the second surface finish layer, the third surface finish layer comprising gold
Data Source
AI summary
In embodiments herein, a surface finish (SF) is formed on conductive contacts of a package substrate for connection to an embedded interconnect bridge circuitry die. In some embodiments, the SF may be electroless nickel-electroless palladium-immersion gold (ENEPIG). In other embodiments, the SF may be immersion gold-electroless palladium-immersion gold (IGEPIG). In other embodiments, the SF may include a layer of electrolytic palladium-gold on a layer of indium or on a layer of cobalt-iron.


