Engine Controller Clock Trouble Diagnosis Circuit
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Solution Overview
Problem
Internal combustion engine controllers face challenges in transmitting multiple trouble findings to a microprocessor due to clock input signal troubles, which can cause serial interface circuits to become fixed in a high or low state, preventing reliable data processing and diagnosis.
Innovation Solution
An internal combustion engine controller with an electromagnetic load controller, clock input signal generating circuit, abnormality diagnosing circuit, and clock trouble diagnosing circuit, utilizing a trouble/abnormality signal output circuit to combine diagnosis signals and minimize data processing load on the microprocessor through logical summing, allowing for reliable transmission of trouble findings over a minimum number of transmission lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a clock input signal generating circuit is used to provide clock signals for internal circuits, then the operation timing of logic circuits and driving circuits can be precisely controlled, but clock input trouble (disconnection, short circuit, faulty mounting) may occur causing the clock signals to be fixed in high or low state
Solution Approach 1:
A clock trouble diagnosing circuit is introduced as an intermediary component between the clock input signal generating circuit and the logic circuits. This diagnosing circuit monitors the clock signals and detects abnormalities (fixed high/low states) before they propagate to the logic circuits, thereby maintaining system reliability while preserving timing precision.
Solution Approach 2:
The clock trouble diagnosing circuit performs preliminary detection of clock signal abnormalities before they affect the operation of logic circuits and driving circuits. By detecting fixed high/low states in advance, the system can take preventive measures (such as setting electromagnetic loads to initial states) to avoid catastrophic failures.
2Loss of information
If multiple trouble diagnosis signals are transmitted to the microprocessor, then comprehensive diagnostic information can be provided, but the data processing load on the microprocessor increases and more transmission lines are required
Solution Approach 1:
Multiple individual trouble diagnosis signals (including clock trouble diagnosis results and electromagnetic load trouble diagnosis results) are merged into a single composite trouble diagnosis signal. This consolidated signal is then transmitted to the microprocessor through a single transmission line, reducing transmission complexity while preserving all diagnostic information.
Solution Approach 2:
The single composite trouble diagnosis signal serves multiple functions: it conveys clock trouble status, electromagnetic load trouble status, and overall system health information. This multi-functional signal reduces the need for multiple dedicated transmission lines and simplifies the data processing load on the microprocessor.
3Reliability
If the output signals of driving circuits for electromagnetic loads are fixed in active state due to clock input trouble, then continuous high current flows to electromagnetic loads, but this can cause indefinite continuation of fuel injection or ignition of the controller
Solution Approach 1:
The clock trouble diagnosing circuit performs preliminary detection of clock signal abnormalities and triggers preliminary protective actions (setting electromagnetic loads to initial states) before continuous high current can cause harmful effects. This preemptive measure prevents indefinite fuel injection continuation and avoids ignition risks in the controller.
Solution Approach 2:
The system converts the potentially harmful fixed high/low clock signal states into useful diagnostic information. By detecting these abnormal states and using them to trigger protective responses, the system transforms what would be catastrophic failures into manageable diagnostic events that prevent secondary damage.
Data Source
AI summary
In an internal combustion engine controller, a clock trouble determination signal from a clock trouble determining circuit that diagnoses any clock input trouble is transmitted in parallel with an abnormality diagnosis signal outputted from an abnormality diagnosing circuit and causes it to be inputted to a trouble/abnormality signal output circuit, and the trouble/abnormality signal output circuit achieves logical summing to output one line of resultant trouble/abnormality output OR signals to a microprocessor (MP). The MP outputs to the trouble/abnormality signal output circuit a trouble/abnormality confirmation input signal, and makes definite any of an abnormal state, a clock trouble state and a normal state based on the result of switching control of the status level of the pertinent trouble/abnormality output OR signal.