Engineered MMIC Substrates for CTE-Matched RF Fabrication

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Solution Overview

Problem

Conventional methods for fabricating RF and MMIC devices face issues such as lattice mismatch defects, thermal expansion coefficient mismatches, and cracking due to different coefficients of thermal expansion (CTEs) between GaN and carrier substrates, limiting device yield and performance and preventing cost-effective large-scale production.

Innovation Solution

The use of engineered substrates with a polycrystalline ceramic core, such as aluminum nitride, that matches the thermal expansion coefficient of the device layer, combined with a method involving bonding, substrate removal, and via formation to create a ground/power plane and cooling structure, allowing for low-loss, high-frequency operation and easier fabrication on larger substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If heteroepitaxial growth is used to deposit GaN on a carrier substrate with different lattice structure, then RF devices can be fabricated, but lattice mismatch creates defects and dislocations that negatively impact device yields and performance

Engineering Contradiction:
Improvefabrication capabilityVSAvoiddevice yield
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces a buffer layer as an intermediary between the carrier substrate and the GaN device layer. This buffer layer serves as a transition zone that accommodates the lattice mismatch between the silicon substrate and GaN, reducing dislocation density and improving device yield while enabling heteroepitaxial growth to proceed

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the physical and chemical parameters of the substrate interface by introducing the buffer layer with specific thickness, composition, and crystal structure parameters. These parameter changes create a gradient transition that reduces the abrupt lattice mismatch, thereby reducing defects while maintaining fabrication capability

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If thermal processing is performed for GaN epitaxial growth, then GaN layers can be formed, but cracking or delamination occurs due to different coefficients of thermal expansion between GaN and carrier substrate

Engineering Contradiction:
Improveepitaxial growth capabilityVSAvoidstructural integrity
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The buffer layer acts as a thermal expansion mediator between the silicon carrier substrate and the GaN layer. During thermal processing for epitaxial growth, the buffer layer accommodates the differential thermal expansion, preventing cracking and delamination while enabling the GaN layer to form successfully

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a composite structure consisting of the silicon carrier substrate, buffer layer, and GaN device layer. This composite material system is designed to manage the thermal expansion mismatch through the intermediate buffer layer, maintaining structural integrity during thermal processing while enabling epitaxial growth

Inventive Principle:
Principle #40Composite materials

3Ease of manufacture

If conventional carrier substrates are used, then GaN layers can be grown, but the different CTEs restrict substrate wafer size and limit scale, preventing reduction of manufacturing cost

Engineering Contradiction:
Improvegrowth capabilityVSAvoidmanufacturing scale
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The buffer layer serves as a thermal expansion mediator that enables the use of larger diameter silicon wafers. By accommodating the CTE mismatch, the buffer layer allows scaling to larger substrate sizes without cracking or delamination, thereby increasing manufacturing scale and reducing per-device costs

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the thermal management parameters of the substrate system by introducing the buffer layer, which enables larger wafer sizes to be processed successfully. This parameter change removes the restriction on substrate wafer size imposed by conventional direct growth methods, allowing scale-up of production

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables lower-cost, high-performance MMIC devices by allowing fabrication on larger substrates with reduced thermal resistance and easier processing, improving device yield and reducing manufacturing costs.

Implementation Method 1

engineered substrates with a polycrystalline ceramic core, such as aluminum nitride, that matches the thermal expansion coefficient of the device layer

Methodology Applied
Scientific EffectThermal expansion coefficient matching: Thermal Expansion

Implementation Method 2

joining a cooling structure to the carrier substrate

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250316618A1Methods for fabrication of MMIC and RF devices on engineered substrates
Publication Date: 2025.10.09 QROMIS INC
  • US20250316618A1 patent drawing
  • US20250316618A1 patent drawing
  • US20250316618A1 patent drawing

AI summary

A method of fabricating a MMIC system includes providing an engineered substrate including a growth substrate and a device layer coupled to the growth substrate, fabricating a plurality of MMIC device elements using the device layer, and providing a carrier substrate including a plurality of metallic structures. The method also includes bonding the plurality of metallic structures to the plurality of MMIC device elements, removing a portion of the growth substrate, and removing a portion of the carrier substrate. The method further includes forming a ground/power plane coupled to the growth substrate, forming a plurality of vias passing from the ground/power plane to one or more of the plurality of MMIC device elements, and joining a cooling structure to the carrier substrate.