Digital Data Rate Enhancement Filter for Oscilloscope Adaptability
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Solution Overview
Problem
Digital oscilloscopes lack flexibility in adjusting the number of channels and temporal resolution for individual sub-circuits, limiting their adaptability to various applications.
Innovation Solution
The implementation of a digital data rate enhancement filter, which includes interpolation filters and a multiplexer circuit, allows for adjustable data rate and temporal resolution, enabling flexible configuration of channel numbers and data parallelism to meet specific requirements of downstream electronic components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed number of channels is processed with a predefined temporal resolution in each circuit, then the system structure is simple and fixed, but the adaptability to different applications is limited
Solution Approach 1:
The patent implements dynamic configurability by allowing the number of channels and temporal resolution to be adjusted independently for different sub-circuits (acquisition, memory, trigger) through a centralized control unit. This enables the system to adapt to various application requirements without requiring multiple fixed systems, resolving the contradiction between adaptability and complexity.
Solution Approach 2:
The patent creates a universal digital oscilloscope system that can serve multiple functions by allowing flexible configuration of channel numbers and temporal resolutions across different sub-circuits. A single system can be adapted to handle diverse measurement scenarios by reconfiguring the interconnection between acquisition, memory, and trigger circuits, eliminating the need for multiple specialized systems.
2Quantity of substance
If the number of channels is increased to process more signals simultaneously, then the signal analysis capability is improved, but the temporal resolution in each circuit must be reduced
Solution Approach 1:
The patent applies local quality by allowing different sub-circuits to have different numbers of channels and temporal resolutions according to their specific requirements. The acquisition circuit can have high temporal resolution with fewer channels, while the memory circuit can handle more channels with adjusted temporal resolution, and the trigger circuit can be configured independently. This resolves the contradiction by optimizing each local circuit rather than applying a uniform configuration.
3Measurement precision
If the temporal resolution is enhanced for precise trigger event detection, then the trigger accuracy is improved, but the data rate increases requiring more memory capacity
Solution Approach 1:
The patent implements dynamic control of temporal resolution and data rate through a centralized configuration system. The temporal resolution can be enhanced specifically in the trigger circuit for accurate event detection, while the memory circuit can be configured with appropriate storage capacity based on the actual measurement requirements. This allows precise trigger detection without unnecessarily increasing memory capacity across the entire system.
Data Source
AI summary
A digital data rate enhancement filter is described. The digital data rate enhancement filter-includes an enhancement filter input, a first interpolation filter, a second interpolation filter, and a multiplexer circuit. The first interpolation filter is connected to the enhancement filter input downstream of the enhancement filter input. The second interpolation filter is connected to the first interpolation filter downstream of the first interpolation filter. The enhancement filter input is configured to receive a digital input signal set. The first interpolation filter is configured to receive the digital input signal set and to interpolate the digital input signal set, thereby obtaining a first interpolated signal set. The second interpolation filter is configured to receive the first interpolated signal set and to interpolate the first interpolated signal set, thereby obtaining a second interpolated signal set. The multiplexer circuit is configured to selectively receive the first interpolated signal set and/or the second interpolated signal set. The multiplexer circuit further is configured to output the first interpolated signal set and/or the second interpolated signal set received. Further, a digital data rate reduction filter and a digital oscilloscope are described.