Enlarged Via and Aligned Metal Wire Layout for Overlay Tolerance
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Solution Overview
Problem
Fully-aligned metal wire structures in integrated circuit devices often fail to provide uniform surface resistance due to overlay errors during the formation of metal wires, leading to inconsistent electrical connections between via contacts and metal wires.
Innovation Solution
The method involves forming a recess above the via contact before creating the metal wire, ensuring that the metal wire overlaps and fully contacts the via contact, even with overlay errors, by maintaining a width difference greater than the overlay margin, and using separate insulating layers to position the metal wires correctly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fully-aligned metal wire structure is formed, then stable electrical connection between via contact and metal wire is achieved, but uniform surface resistance cannot be provided due to overlay error
Solution Approach 1:
A recess is formed above the via contact before forming the metal wire. This preliminary structural preparation ensures that even with overlay errors during metal wire formation, the metal wire will overlap and fully contact the via contact, maintaining reliable electrical connection while accommodating manufacturing tolerances.
Solution Approach 2:
The width of the via contact is enlarged to be greater than the width of the metal wire, creating a width difference greater than the overlay margin. This parameter change ensures that the metal wire can fully contact the via contact even with overlay errors, maintaining uniform surface resistance and electrical connection stability.
2Manufacturing precision
If the width of via contact is enlarged to be greater than metal wire width, then overlay error tolerance is improved, but via contact area increases
Solution Approach 1:
Instead of uniformly enlarging the via contact area in all directions, the invention creates a recess structure above the via contact. This dimensional approach allows the via contact to have a larger footprint for overlay tolerance while the recess provides the necessary overlap area without proportionally increasing the overall via contact area.
Data Source
AI summary
Integrated circuit devices and methods of forming the same are provided. The methods of forming an integrated circuit device may include forming a first insulating layer and a via contact on a substrate. The substrate may include an upper surface facing the via contact, and the via contact may be in the first insulating layer and may include a lower surface facing the substrate and an upper surface opposite to the lower surface. The methods may also include forming a second insulating layer and a metallic wire on the via contact. The metallic wire may be in the second insulating layer and may include a lower surface that faces the substrate and contacts the upper surface of the via contact. Both the lower surface of the metallic wire and an interface between the metallic wire and the via contact may have a first width in a horizontal direction that is parallel to the upper surface of the substrate.


