Entangled Threads for Low-Overhead Accelerator Execution

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Solution Overview

Problem

Existing threading technologies increase system overhead and implementation inefficiencies due to host supervision and source code modifications, limiting efficient use of accelerator cores.

Innovation Solution

The implementation of entangled threads, where a first thread is generated in a user memory space and enters a sleep state in a kernel memory space, while a second thread executes on an accelerator, allowing seamless execution and result transfer without host processor intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional threading is used with host supervision, then thread management and control are maintained, but system overhead increases and efficiency decreases

Engineering Contradiction:
Improvethread execution efficiencyVSAvoidsystem overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments thread management into two independent parts: a host thread that handles high-level process control and an accelerator thread that executes computational tasks autonomously. This segmentation allows the host to offload computation-intensive tasks without direct supervision, reducing system overhead while maintaining control capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism through shared memory and synchronization primitives that enable communication between the host thread and accelerator thread without requiring continuous host supervision. This intermediary layer reduces the overhead of direct host control while maintaining thread coordination.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If accelerator cores are used for parallel execution, then computational speed increases, but integration with host system becomes complex

Engineering Contradiction:
Improvecomputational execution speedVSAvoidhost-accelerator integration complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The accelerator thread is designed to be universal in its functionality, able to execute various computational tasks while maintaining a standardized interface with the host system. This multi-functionality allows different types of computations to be performed on the accelerator without increasing integration complexity, as the same thread management mechanisms apply regardless of the specific computational task.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If source code modifications are required for threading implementation, then thread control is achieved, but implementation efficiency decreases

Engineering Contradiction:
Improvethread control capabilityVSAvoidsource code modification requirement
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

The system creates a copy of the thread execution model that runs on the accelerator independently from the host thread. This copying approach allows the accelerator thread to maintain the same control capabilities as traditional threading without requiring modifications to the original source code, as the copied thread model operates autonomously on the accelerator hardware.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20250321781A1Entangled threads
Publication Date: 2025.10.16 SAMSUNG ELECTRONICS CO LTD
  • US20250321781A1 patent drawing
  • US20250321781A1 patent drawing
  • US20250321781A1 patent drawing

AI summary

Provided are systems, methods, and apparatuses for entangled threads. In one or more examples, the systems, devices, and methods include generating, via a host, a first thread of a process; generating, via the first thread, a second thread, the first thread configuring the second thread as a proxy of the first thread; and executing the second thread on an accelerator. In some examples, the first thread places itself in the sleep state while the second thread executes on the accelerator. In some examples, the systems, devices, and methods include configuring, via the host, the first thread to execute on a processor of the host, and configuring, via the first thread, the second thread to execute on the accelerator.