Flash Memory Page Organization for Enterprise Sectors and ECC

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Solution Overview

Problem

Flash-memory systems are inefficient in enterprise-level applications due to incompatibility with hard-drive file systems, resulting in wasted memory and reduced error-correction capabilities when trying to store larger sectors, particularly in smaller geometry flash memories.

Innovation Solution

A flash memory system is designed with pages containing 2N data locations and K spare locations, where at least one page stores 2M−1 user data sectors, with error-correction code (ECC) data calculated and stored in unused data locations, allowing for efficient storage of enterprise-sized sectors and enhanced ECC protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If larger sectors (520 or 528 bytes) are forced into existing flash-memory architectures, then compatibility with enterprise hard-drive systems is improved, but memory efficiency deteriorates with many unused bytes in each page

Engineering Contradiction:
Improvecompatibility with enterprise hard-drive systemsVSAvoidmemory efficiency
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

The patent changes the sector size parameter from traditional power-of-two sizes to enterprise-standard sizes (520 or 528 bytes), and reorganizes the page structure to accommodate these new parameters while maintaining memory efficiency through flexible sector arrangements

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the flash memory page into multiple flexible sectors of enterprise size (520 or 528 bytes), allowing efficient packing of sectors within pages and reducing wasted memory space while maintaining compatibility with hard-drive systems

Inventive Principle:
Principle #1Segmentation

2Loss of substance

If larger sectors are used to reduce wasted memory, then memory efficiency is improved, but the number of bytes available for ECC and metadata is reduced

Engineering Contradiction:
Improvememory efficiencyVSAvoidECC protection level
Core Design Contradiction:
Loss of substanceVSReliability

Solution Approach 1:

The patent utilizes the spare area dimension of flash memory pages, which is traditionally separate from user data storage, to store ECC and metadata information. This allows larger user sectors without compromising reliability by adding ECC capacity in the spare dimension

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If more bytes are allocated to ECC and metadata, then reliability is improved, but memory efficiency deteriorates with more hidden bytes not available for user data

Engineering Contradiction:
ImproveECC protection levelVSAvoidmemory efficiency
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent makes the spare area serve multiple functions: storing ECC information, metadata, and potentially user data overflow. This multi-functional use of the spare area improves reliability without sacrificing user data capacity, as the same space serves multiple purposes

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8245112B2Flash memory organization
Publication Date: 2012.08.14 LSI CORP
  • US8245112B2 patent drawing
  • US8245112B2 patent drawing
  • US8245112B2 patent drawing

AI summary

A flash-memory system is organized into a plurality of blocks and a plurality of pages in each block, each page having 2N data locations and K spare locations. At least one page in the memory has 2M−1 user data sectors and each sector has 2N-M+L locations therein. Error-correction code (ECC) data related to the user data is calculated and stored in at least the 2M user data locations unused by the 2M−1 user data sectors. Because L is at least 1 but less than 2N-M (N>M), at least a portion of one user data sector is stored in the spare memory locations. Additional locations in each page are available to allow for the ECC data to have additional redundancy bits added per sector, thereby making the flash memory system more robust and reliable.