Integrated Envelope Detector Circuit for Low-Rate RF PWM Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing envelope detector circuits for galvanic isolators face challenges in efficiently converting low-level radio-frequency carrier signals into low-frequency PWM signals, particularly at low data rates, and often require external components or high current consumption.
Innovation Solution
A fully integrated envelope detector circuit with a rectifier stage featuring a differential input transistor pair and an amplifier stage, including a resistive element in parallel with the load, designed to produce an amplified rectified signal indicative of the envelope, allowing operation at low data rates without external components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional envelope detector circuits are used for galvanic isolators, then they can convert radio-frequency carrier signals into low-frequency PWM signals, but they require external components and consume high current
Solution Approach 1:
The patent combines the rectifier stage and amplifier stage into a single integrated envelope detector circuit that can be fully integrated on a galvanic isolator chip. The differential input transistor pair (first and second transistors) forms the rectifier stage, while the third transistor forms the amplifier stage, eliminating the need for external components and reducing current consumption through optimized internal biasing.
Solution Approach 2:
The patent optimizes the biasing parameters and transistor sizing to achieve low current consumption. The third transistor is biased to provide amplification while consuming minimal current, and the resistive element is sized to provide appropriate loading without excessive power dissipation, enabling the circuit to operate efficiently at low data rates.
2Device complexity
If conventional envelope detector circuits are used, then they can detect the envelope of radio-frequency signals, but they require external components which increases device complexity
Solution Approach 1:
The patent integrates both the rectifier function (performed by the differential input transistor pair) and the amplifier function (performed by the third transistor) into a single circuit block that can be fully fabricated on the galvanic isolator chip, eliminating external components and reducing overall device complexity while maintaining low data rate performance.
Solution Approach 2:
The envelope detector circuit is designed to be self-contained, with the third transistor providing automatic amplification of the rectified signal without requiring external active components. The circuit uses internal biasing and the inherent properties of the transistor configuration to achieve the necessary signal conditioning.
3Reliability
If the envelope detector circuit is designed for low data rates, then it achieves high immunity to common mode transients, but it may sacrifice detection efficiency
Solution Approach 1:
The patent optimizes the transistor sizing and biasing parameters to achieve both low data rate performance and high common mode transient immunity. The differential input transistor pair provides rejection of common mode signals, while the third transistor is biased to provide sufficient amplification gain for low data rate applications without sacrificing detection efficiency.
Solution Approach 2:
The circuit employs the inherent feedback mechanisms in the differential transistor configuration to maintain stability and improve common mode rejection. The biased third transistor provides a controlled gain that stabilizes the detection process, ensuring reliable envelope detection even at low data rates with high immunity to common mode transients.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient envelope detection at low data rates, achieving high immunity to common mode transients, low current consumption, and integration within a single chip, facilitating high isolation ratings and common mode transient immunity.
Implementation Method 1
A rectified signal indicative of an envelope of the radio-frequency amplitude modulated signal is produced at the intermediate node
Implementation Method 2
an amplifier stage coupled to the intermediate node to receive the rectified signal, and configured to produce at an output node an amplified rectified signal indicative of the envelope
Data Source
AI summary
A rectifier stage includes a differential input transistor pair coupled between a reference voltage node and an intermediate node, and a load circuit coupled between the intermediate node and a supply voltage node. The differential input transistor pair receives a radio-frequency amplitude modulated signal. A rectified signal indicative of an envelope of the radio-frequency amplitude modulated signal is produced at the intermediate node. An amplifier stage coupled to the intermediate node produces an amplified rectified signal at an output node that is indicative of the envelope of the radio-frequency amplitude modulated signal. The rectifier stage includes a resistive element coupled between the intermediate node and the supply voltage node in parallel to the load circuit.