Envelope Detector for High-Speed USB2 Signal Detection
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Solution Overview
Problem
Conventional envelope detectors are limited to low to middle frequency bands and data rates, making them ineffective for high-speed serial communication applications such as USB standards, which require precise detection of peak signal levels.
Innovation Solution
A data receiving device with an envelope detector circuit that includes pairs of detectors, a logic circuit for generating resets, and a receiver circuit to generate outputs based on detector outputs, utilizing current sources and amplifiers to enhance detection precision and operate effectively at high speeds, such as 480 Mbps, with adjustable thresholds and low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional envelope detectors are used, then the device complexity is low, but the operating frequency and data rate are limited to low to middle bands
Solution Approach 1:
The envelope detector is divided into multiple independent detector circuits (first detector circuit, second detector circuit, third detector circuit, fourth detector circuit), each handling specific aspects of the differential input signal. This segmentation allows parallel processing of high-frequency signals while maintaining manageable complexity in each individual detector unit.
Solution Approach 2:
The patent transitions from single-ended detection to differential detection by processing both positive and negative differential input signals through separate detector circuits. This dimensional expansion enables high-speed operation by utilizing both signal polarities simultaneously, effectively doubling the information processing capability.
2Productivity
If envelope detectors operate at high speeds, then data rate increases, but power consumption increases
Solution Approach 1:
The logic circuit generates a reset signal based on detector outputs that feeds back to control the operation of detector circuits. This feedback mechanism ensures detectors are activated only when needed (when differential input signal exceeds threshold), reducing unnecessary power consumption during idle or low-signal conditions while maintaining high data rate capability.
Solution Approach 2:
The envelope detector employs dynamic threshold detection where the reset signal dynamically controls the activation state of detector circuits based on real-time signal conditions. This dynamic operation allows the system to adapt power consumption to actual processing needs, enabling high data rates only when signal conditions require them.
3Measurement precision
If detection precision is improved, then peak signal level detection accuracy increases, but device complexity increases
Solution Approach 1:
Each detector circuit is designed with specialized local characteristics optimized for specific detection tasks. The first and second detector circuits process the positive differential signal while the third and fourth process the negative differential signal, with each circuit having tailored threshold detection capabilities. This local optimization achieves high precision without requiring every circuit to be universally complex.
Solution Approach 2:
The patent combines multiple detector circuits with a logic circuit to achieve high precision detection. By merging the outputs of four detector circuits through the logic circuit, the system achieves accurate peak signal level detection that would be difficult to accomplish with a single complex detector, distributing the complexity across multiple simpler unified components.
Data Source
AI summary
A data receiving device may include an envelope detector that may include first and second inputs configured to receive a differential input signal, a first pair of detectors coupled to the first input and configured to generate first and second detector outputs, and a second pair of detectors coupled to the second input and configured to generate third and fourth detector outputs. The envelope detector may also include a logic circuit configured to generate a reset based upon the first and third detectors. The data receiving device may also include a receiver circuit coupled to the envelope detector and configured to generate an output based upon the second and fourth detectors along with the reset, and a first bit detection circuit coupled to the receiver circuit.


