Envelope Tracking Power Circuit With Group Delay Tolerance

The patent applies preliminary action by generating multiple delayed versions of the digital target voltage in advance, creating a bank of pre-delayed signals that cover the expected range of group delays. This allows the system to select the appropriately delayed signal before it is needed, compensating for the processing delay in the ETIC without waiting for the delay to occur

The patent implements dynamics by making the delay compensation adaptive and selectable. The system dynamically chooses from multiple delay options based on the actual group delay conditions, allowing the delay parameter to be adjusted rather than fixed. This enables the system to optimize alignment between ET voltage and power envelope under varying operating conditions

The patent applies segmentation by dividing the delay compensation function into multiple parallel delay paths, each with a different delay factor. Instead of using a single complex variable delay element, the system segments the problem into discrete delay stages, with each stage handling a specific delay amount. This makes the complex delay compensation task manageable through modular, independent delay circuits

The patent uses partial action by implementing a finite set of discrete delay factors rather than attempting to cover all possible delay values continuously. The system provides sufficient delay coverage for practical operating conditions without over-engineering for every possible scenario. This selective approach to delay compensation reduces circuit complexity while maintaining adequate alignment precision