EOA Circuit Layout Reduction via Signal Reset and Restore
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Solution Overview
Problem
Conventional EOA circuits for OLED display panels require a large layout space due to their complex structure, making them unsuitable for narrow-frame designs.
Innovation Solution
The EOA circuit is redesigned with a simplified structure that includes an output module to reset the output signal from high to low levels during specific scanning and clock signal periods and a control module to restore the signal from low to high levels, using fewer transistors and clock signal lines, allowing for a more compact layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a conventional 8T1C EOA circuit structure is employed, then the circuit can perform emission control functions, but the layout size occupies a large space which is unfavorable to narrow-frame design
Solution Approach 1:
The EOA circuit is divided into two independent modules: an output module for signal generation and reset, and a control module for signal restoration. This segmentation allows each module to be optimized independently, reducing the overall layout size while maintaining functionality.
Solution Approach 2:
The patent extracts and eliminates redundant components from the conventional 8T1C structure. By removing unnecessary transistors and capacitors, the circuit achieves the same emission control function with fewer elements, directly reducing layout area.
2Reliability
If a conventional 8T1C EOA circuit structure is employed, then the circuit can perform emission control functions, but the circuit requires four first clock signal lines and two second clock signal lines increasing device complexity
Solution Approach 1:
The patent merges the functions of multiple clock signal lines into a reduced set of clock lines. By combining control functions that previously required separate clock signals, the circuit maintains reliable emission control while reducing the number of signal lines from six to fewer.
Solution Approach 2:
The remaining clock signal lines in the simplified circuit are designed to perform multiple functions simultaneously. Each clock line controls multiple transistors or modules, making the circuit more versatile and reducing the total number of dedicated signal lines required.
Data Source
AI summary
The present disclosure relates to an EOA circuit, a display panel, and a terminal. The EOA circuit includes an output module and a control module; wherein the output module is configured to generate an output signal according to a first scanning signal and a clock signal, and the output module is further configured to reset the output signal from a high level to a low level within a period where the first scanning signal is an active level and a period where the clock signal is an inactive level; and the control module is configured to restore the output signal from the low level to the high level according to a second scanning signal within a period where the first scanning signal is at the inactive level.


