Epilogue Loop Vectorization Factor Selection Using Compiler Cost Models
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Solution Overview
Problem
Existing compilers struggle with efficiently selecting a vectorization factor for epilogue loops, leading to suboptimal performance due to varying architectural limitations and lack of consideration for factors like register usage, trip count, and code size, which can result in inefficient vectorization.
Innovation Solution
A method to automatically select a vectorization factor for epilogue loops based on considerations such as register usage, trip count, and estimated cost, using a cost model to determine the most profitable factor, thereby optimizing performance without user intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed vectorization factor is used for epilogue loops, then the compilation process is simple, but the execution performance is suboptimal due to varying architectural limitations
Solution Approach 1:
The patent implements dynamic selection of vectorization factors based on runtime characteristics of epilogue loops. The compiler analyzes loop properties such as trip count, register usage requirements, and code size implications to automatically select the most appropriate vectorization factor from multiple candidates, transforming the static compilation approach into a dynamic adaptive one that optimizes for actual execution performance.
Solution Approach 2:
The patent changes the parameter of vectorization factor from a fixed value to a dynamically selected value based on multiple considerations including register usage, trip count, and code size. By evaluating different vectorization factor candidates and selecting the optimal one, the system adapts parameters to match architectural limitations and performance requirements, resolving the contradiction between simple compilation and optimal performance.
2Productivity
If vectorization factor selection considers multiple factors like register usage and trip count, then performance optimization improves, but the selection process becomes more complex
Solution Approach 1:
The patent performs preliminary analysis of epilogue loop characteristics during compilation, evaluating multiple factors including register usage, trip count, and code size implications before selecting the vectorization factor. By conducting this analysis in advance and caching the results, the system avoids complex runtime decisions while achieving optimized performance, effectively managing the trade-off between optimization quality and process complexity.
3Speed
If masked vector instructions are used to speed up epilogue loops, then execution speed improves, but architecture compatibility decreases
Solution Approach 1:
The patent applies architecture-specific optimizations locally where appropriate. Instead of universally applying masked vector instructions across all architectures, the system analyzes the target architecture's capabilities and applies optimized vectorization strategies only where they provide benefit. This allows the compiler to achieve high execution speed on architectures that support masked instructions while maintaining compatibility and reasonable performance on architectures that do not, resolving the contradiction between speed improvement and architecture compatibility.
Data Source
AI summary
A vectorization factor to be used in vectorization of an epilogue loop in program code is automatically selected. The automatically selecting includes selecting the vectorization factor from a plurality of candidate vectorization factors based on one or more considerations relating to vectorizing the epilogue loop. The vectorization factor that is automatically selected is used in vectorizing the epilogue loop.