Epitaxial Layers on Contact Electrodes for Thin-Film Transistors

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Solution Overview

Problem

Thin-film transistors (TFTs) face high contact resistances for source and drain electrodes due to low band offset of doped oxide, metal oxide, or conductive materials, which can lead to performance degradation and short channel issues.

Innovation Solution

A top-gate and bottom-contact architecture is implemented where the channel layer is in contact with an epitaxial layer above the source and drain electrodes, aligning the conduction band of the channel material with the energy level of the conductive material, and having a bandgap smaller than the channel material to reduce contact resistances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If doped oxide, metal oxide, or conductive materials are used for contact electrodes, then conductivity is improved, but contact resistance increases due to low band offset

Engineering Contradiction:
Improvecontact resistanceVSAvoidperformance degradation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

An epitaxial layer is introduced as an intermediary between the contact electrode and the channel layer. This epitaxial layer has a bandgap smaller than the channel material and its conduction band is aligned with the energy level of the conductive material, serving as a mediator that facilitates charge carrier transport and reduces contact resistance while preventing performance degradation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the bandgap parameter of the material between the contact electrode and channel layer. By selecting an epitaxial layer with a smaller bandgap than the channel material and aligning its conduction band with the energy level of the conductive material, the energy barrier for charge carrier transport is reduced, thereby lowering contact resistance

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If conventional transistor architecture is used, then manufacturing is simplified, but short channel effects occur leading to performance degradation

Engineering Contradiction:
Improvefabrication simplicityVSAvoidshort channel performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent transitions from a planar contact architecture to a vertical stacked architecture where the channel layer is positioned above the contact electrodes through an epitaxial layer. This dimensional change allows for better control of short channel effects while maintaining compatibility with conventional manufacturing processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces contact resistances between the channel layer and the electrodes, enhancing the performance of TFTs by improving conductivity and minimizing short channel effects.

Implementation Method 1

A conduction band of the channel material and a conduction band of a material of the epitaxial layer are substantially aligned with an energy level of the conductive material

Methodology Applied
Scientific EffectBand alignment:

Implementation Method 2

A bandgap of the material of the epitaxial layer is smaller than a bandgap of the channel material, so that the contact resistances between the channel layer and a contact electrode may be reduced

Methodology Applied
Scientific EffectBandgap effect:

Data Source

PatentUS11522060B2Epitaxial layers on contact electrodes for thin- film transistors
Publication Date: 2022.12.06 INTEL CORP
  • US11522060B2 patent drawing
  • US11522060B2 patent drawing
  • US11522060B2 patent drawing

AI summary

Embodiments herein describe techniques for a thin-film transistor (TFT) above a substrate. The transistor includes a contact electrode having a conductive material above the substrate, an epitaxial layer above the contact electrode, and a channel layer including a channel material above the epitaxial layer and above the contact electrode. The channel layer is in contact at least partially with the epitaxial layer. A conduction band of the channel material and a conduction band of a material of the epitaxial layer are substantially aligned with an energy level of the conductive material of the contact electrode. A bandgap of the material of the epitaxial layer is smaller than a bandgap of the channel material. Furthermore, a gate electrode is above the channel layer, and separated from the channel layer by a gate dielectric layer. Other embodiments may be described and/or claimed.