Epitaxial Source/Drain Doping After Gate Replacement in GAA Transistors
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Solution Overview
Problem
Conventional epitaxial features in multi-gate transistors, such as GAA transistors, do not adequately balance dopant concentration in source/drain regions, leading to issues like metal gate extrusion and reduced device performance due to dopant diffusion after the gate replacement process.
Innovation Solution
Perform an additional dopant implantation step post-gate replacement to increase phosphorus concentration in the source/drain features, ensuring low resistance without causing metal gate extrusion by forming the metal gate after the initial process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional epitaxial features are used in multi-gate transistors, then the device structure can be formed, but dopant diffusion occurs after gate replacement leading to metal gate extrusion and reduced device performance
Solution Approach 1:
The patent performs dopant implantation into the epitaxial source/drain regions AFTER the metal gate is formed, rather than before. This preliminary action of forming the gate first prevents the metal gate extrusion that occurs when dopants are implanted earlier and subsequently diffuse into the gate region during high-temperature processing steps.
Solution Approach 2:
The patent changes the timing parameter of the dopant implantation process to occur after gate formation, and adjusts the implantation energy and dose parameters to achieve the desired dopant concentration profile in the source/drain regions without causing gate extrusion. The epitaxial growth parameters are also optimized to control the initial dopant distribution.
2Reliability
If dopant concentration in source/drain regions is increased to reduce resistance, then electrical conductivity improves, but metal gate extrusion occurs
Solution Approach 1:
The metal gate is formed preliminarily before dopant implantation into the source/drain regions. This sequence ensures that the gate structure is already in place and protected, allowing high dopant concentrations to be introduced into the source/drain regions to reduce resistance without causing the gate to extrude into the source/drain regions.
Solution Approach 2:
The patent applies dopant implantation locally to the source/drain regions with high precision, concentrating the dopant material where it is needed for low resistance while preventing it from reaching the gate region. The epitaxial structure provides a controlled environment for localized dopant introduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances device performance by maintaining low resistance in the source/drain regions while preventing metal gate extrusion, thereby improving yield and reducing leakage current.
Implementation Method 1
performing an ion implantation to increase a dopant concentration of a dopant in the epitaxial source/drain regions
Implementation Method 2
forming an epitaxial feature in the source/drain trench
Data Source
AI summary
The present disclosure provides a semiconductor device and a method of forming the same. A method according one embodiment of the present disclosure includes forming a stack of channel layers interleaved by sacrificial layers, patterning the stack to form a fin-shape structure, forming a dummy gate stack over a channel region of the fin-shape structure, recessing a source/drain region to form a source/drain trench, forming an epitaxial feature in the source/drain trench, after the forming of the epitaxial feature removing the dummy gate stack, releasing the channel layers in the channel region as channel members, forming a gate structure wrapping around each of the channel members, and after the forming of the gate structure performing an ion implantation to increase a dopant concentration of a dopant in the epitaxial feature.