Epitaxial Ge-Removed SOI for Thin Semiconductor Devices
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Solution Overview
Problem
Conventional methods for scaling down field-effect transistors face challenges with extremely thin silicon-on-insulator devices, such as threshold-voltage fluctuations, increased resistance due to amorphization and defects from ion implantation, and damage to gate dielectrics, especially when silicon layers are 10 nm or less.
Innovation Solution
The method involves epitaxially growing a germanium-containing layer and a semiconductor layer with a thickness of 10 nm or less, removing a portion of the germanium layer to form a void, and filling it with a dielectric material, followed by in-situ doped source and drain region growth and annealing to form doped extension regions without ion implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If ion implantation is used to dope extremely thin silicon layers (10 nm or less), then dopant introduction is achieved, but the semiconductor layer becomes amorphous and resistance increases
Solution Approach 1:
The patent replaces ion implantation (mechanical/physical process causing damage) with thermal diffusion (thermal process) to introduce dopants into the extremely thin silicon layer. This substitution eliminates the amorphization and defect formation caused by high-energy ion bombardment while still achieving the required dopant concentration through controlled thermal diffusion from a doped cap layer.
Solution Approach 2:
The patent introduces a doped cap layer as an intermediary reservoir that supplies dopants to the extremely thin silicon layer through thermal diffusion. This intermediary approach allows dopant introduction without direct ion implantation into the fragile thin layer, preventing damage while achieving the desired doping profile.
2Productivity
If conventional scaling is applied to reduce device dimensions, then integration density improves, but threshold-voltage and subthreshold slope fluctuation increase due to thickness variations
Solution Approach 1:
The patent changes the thickness parameter of the silicon layer to be extremely thin (10 nm or less) and maintains it through epitaxial growth with precise control. This parameter change, combined with the absence of ion implantation damage, reduces thickness variations across the wafer and improves threshold-voltage control while enabling further scaling for higher integration density.
Solution Approach 2:
By replacing ion implantation with thermal diffusion, the patent eliminates the damage and variability introduced by ion implantation processes, thereby improving the precision of threshold-voltage control as devices are scaled down for higher integration density.
3Length of moving object
If silicon layer thickness is reduced to 10 nm or less, then device compactness improves, but ion implantation causes severe damage and high external resistance
Solution Approach 1:
The patent substitutes ion implantation with thermal diffusion as the doping mechanism. This replacement eliminates the harmful mechanical damage caused by high-energy ion bombardment of the extremely thin silicon layer, avoiding amorphization and defect formation while still achieving the necessary dopant introduction for device operation.
Solution Approach 2:
The doped cap layer serves as an intermediary that enables dopant introduction into the extremely thin silicon layer through gentle thermal diffusion, avoiding direct ion implantation damage while maintaining the benefits of thin-layer device compactness.
4Quantity of substance
If ion implantation is used for doping, then dopant introduction is achieved, but gate dielectric damage occurs
Solution Approach 1:
The patent replaces ion implantation with thermal diffusion, eliminating the high-energy ion bombardment that damages gate dielectrics. The thermal diffusion process introduces dopants through the cap layer into the silicon channel without the mechanical damage associated with ion implantation, preserving gate dielectric integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures precise thickness control, reduces external resistance, and avoids the defects and damage associated with ion implantation, enhancing the performance and reliability of extremely thin silicon-on-insulator devices.
Implementation Method 1
epitaxially growing a germanium-containing (Ge) layer on the substrate
Implementation Method 2
epitaxially growing a semiconductor layer on the germanium-containing (Ge) layer
Implementation Method 3
in-situ doped source and drain regions are grown on the semiconductor layer
Implementation Method 4
annealing said source and drain regions to form doped extension regions in the semiconductor layer
Data Source
AI summary
A semiconductor device and a method of fabricating a semiconductor device are disclosed. In one embodiment, the method comprises providing a semiconductor substrate, epitaxially growing a Ge layer on the substrate, and epitaxially growing a semiconductor layer on the Ge layer, where the semiconductor layer has a thickness of 10 nm or less. This method further comprises removing at least a portion of the Ge layer to form a void beneath the Si layer, and filling the void at least partially with a dielectric material. In this way, the semiconductor layer becomes an extremely thin semiconductor-on-insulator layer. In one embodiment, after the void is filled with the dielectric material, in-situ doped source and drain regions are grown on the semiconductor layer. In one embodiment, the method further comprises annealing said source and drain regions to form doped extension regions in the semiconductor layer.